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A nano-CMOS based universal voltage level converter for multi-VDD SoCs.

Power dissipation of integrated circuits is the most demanding issue for very large scale integration (VLSI) design engineers, especially for portable and mobile applications. Use of multiple supply voltages systems, which employs level converter between two voltage islands is one of the most effective ways to reduce power consumption. In this thesis work, a unique level converter known as universal level converter (ULC), capable of four distinct level converting operations, is proposed. The schematic and layout of ULC are built and simulated using CADENCE. The ULC is characterized by performing three analysis such as parametric, power, and load analysis which prove that the design has an average power consumption reduction of about 85-97% and capable of producing stable output at low voltages like 0.45V even under varying load conditions.

Identiferoai:union.ndltd.org:unt.edu/info:ark/67531/metadc3602
Date05 1900
CreatorsVadlmudi, Tripurasuparna
ContributorsMohanty, Saraju P., Kougianos, Elias, Mikler, Armin R.
PublisherUniversity of North Texas
Source SetsUniversity of North Texas
LanguageEnglish
Detected LanguageEnglish
TypeThesis or Dissertation
FormatText
RightsPublic, Copyright, Vadlmudi, Tripurasuparna, Copyright is held by the author, unless otherwise noted. All rights reserved.

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