Switching mode DC/DC converters are critical building blocks in portable devices and hence their power efficiency, accuracy and cost are a major issue. The primary focus of this thesis is to address these critical issues.This thesis focuses on the different methods of feedback control loop which are employed in the switching mode DC/DC converters such as voltage mode control and current mode control. It also discusses about the structure of buck converter and tries to find an efficient solution for stepping-down the DC voltage level in ultra-low power applications. Based on this analysis, a 20 MHz voltage mode DC/DC buck converter with an on-chip compensated error amplifier in 65 nm CMOS process is designed and implemented.The power efficiency has been improved by sizing the power switches to have a low parasitic output and gate capacitances to reduce the capacitive and gate-drive losses. Also the error amplifier biasing current is chosen a small value (12.5 μA) to reduce the power dissipations in the control loop of the system. The maximum 84% power efficiency is achieved at 1.1 V to 500 mV conversion, above 81% efficiency can be achieved at load current from 0.5 mA to 1.26 mA. Due to wide bandwidth error amplifier and proper compensation network the fast transient response with settling time around 45 μs is achieved.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-80395 |
| Date | January 2012 |
| Creators | Safari, Naeim |
| Publisher | Linköpings universitet, Elektroniska komponenter, Linköpings universitet, Tekniska högskolan |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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