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Implementation of A Voltage Boost Level Clamping Circuit and A Wideband Random Signal Generator

The first topic of this thesis is a voltage boost level clamping circuit for a flash memory which utilizes an implicit feedback loop as well as MOS transistors with different threshold voltages. The proposed design can be added to charge pumps to stabilize the output voltage. The unwanted output voltage spikes introduced by the linear pumping ratio are prevented. Not only are possible damages to memory cores avoided, the power disspation is reduced in contrast with prior regulator methods.
The second topic is a switch-current 3-bit CMOS wideband random signal generator, which utilizes a digital normalizer to flatten the distribution of the probability in the entire range of B parameter. The ¡§colored¡¨ random numbers problem in prior designs is resolved. In addition, the coefficients of the proposed design are dynamically adjustable.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0624103-110530
Date24 June 2003
CreatorsCheng, Hong-Chen
ContributorsHsiao-Hwa Chen, Ju-Ya Chen, Chua-Chin Wang, Lon-Rong Hu
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0624103-110530
Rightsnot_available, Copyright information available at source archive

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