Modern switch-mode power supplies (SMPS) used for point-of-load (PoL) applications need to meet increasingly stringent requirements on voltage regulation, while minimizing physical volume and optimizing conversion efficiency. The focus of this thesis is the voltage regulation capability of low-power PoL converters during load transients. The main objective is to investigate converter topologies and control techniques that can achieve fast and smooth transient performance without significant penalty in volume and efficiency. The digital control method is used due to its ability to implement sophisticated control algorithms. The first part of this thesis investigates a dual output stages converter, with a small auxiliary output stage connected in parallel with the main output stage. While the main output stage is responsible for steady-state operation and designed to achieve optimum efficiency, the auxiliary stage is activated when a load transient occurs, to help suppress voltage deviation. Experimental results on a 6 V-to-1 V, 3W buck converter shows 35% improvement in peak transient voltage deviation while maintaining the same efficiency profile, compared to an equivalent buck converter. The second part of this thesis introduces a flyback-transformer based buck (FTBB) converter. In this topology, the conventional buck inductor is replaced with the primary winding of the flyback transformer, an extra switch, and a set of small auxiliary switches on the secondary side. During heavy-to-light load transients the inductor current is steered away from the output capacitor to the input port, achieving both energy recycling and savings due to reduced voltage overshoots. The light-to-heavy transient response is improved by reducing the equivalent inductance of the primary transformer winding to its leakage value. Compared to an equivalent buck converter, experiment results on a 6 V-to-1 V, 3 W prototype show three times smaller maximum output voltage deviation during load transients and, for frequently changing loads, about 7% decrease in power losses.
| Identifer | oai:union.ndltd.org:LACETR/oai:collectionscanada.gc.ca:OTU.1807/36063 |
| Date | 13 August 2013 |
| Creators | Wang, Jing |
| Contributors | Ng, Wai Tung, Prodic, Aleksandar |
| Source Sets | Library and Archives Canada ETDs Repository / Centre d'archives des thèses électroniques de Bibliothèque et Archives Canada |
| Language | en_ca |
| Detected Language | English |
| Type | Thesis |
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