The main objective of this dissertation is to investigate a design methodology that can characterize and compensate for process and temperature variation. First, a design methodology is discussed to handle process variation in low-power memory for image processing application. This is followed by a design technique to characterize and recover TSV-defect-induced signal degradation in a 3D integrated circuit. For thermal variation, the spatiotemporal power migration is proposed as a methodology to handle thermal issues in digital systems both during the test and normal operation. The power migration continuously distributes the generated heat in space and time to control chip temperature. To enable this approach a unique method is developed, and verified through hardware for post-fabrication characterization of thermal system and prediction of transient variation in chip temperature. The inverse temperature dependence in a digital logic is characterized through hardware to help better thermal management in wide operating voltage design.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/50148 |
| Date | 18 September 2012 |
| Creators | Cho, Minki |
| Contributors | Mukhopadhyay, Saibal |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
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