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FPGA-based real-time simulation model of a rotating missile for hardware verification

During the development of complex embedded systems like controllers, conducting real-world testing can often be impractical due to factors such as cost, safety concerns, or unavailability during certain stages of development. In such scenarios, hardware-in-the-loop testing is a practical alternative. Hardware-in-the-loop testing involves interfacing the device under test with a simulation environment that mimics real-world inputs, enabling comprehensive testing without the associated risks or constraints. This thesis focuses on the transformation of a Matlab model depicting the behavior of a falling missile into VHDL. The purpose of this model is to integrate with an FPGA to facilitate real-time testing of control algorithm and associated hardware. The conversion successfully translated the Matlab model into VHDL, enabling execution within the constraints of the real-time system.  While the VHDL model closely mirrors the original Matlab model, minor deviations exist due to the discretisation process, resulting in slight discrepancies. However, suggestions on how to overcome these are proposed.

Identiferoai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-204864
Date January 2024
CreatorsBengtsson, Richard
PublisherLinköpings universitet, Datorteknik
Source SetsDiVA Archive at Upsalla University
LanguageEnglish
Detected LanguageEnglish
TypeStudent thesis, info:eu-repo/semantics/bachelorThesis, text
Formatapplication/pdf
Rightsinfo:eu-repo/semantics/openAccess

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