This thesis presents novel aspects of the design of Strategist, a microprocessor designed to support efficient rewriting-based computation and pattern matching in particular. After introducing the architecture of Strategist, three of its novel features are described: predicate compression, quadrature low-swing logic and a high radix, bufferless on-chip network design. Predicate compression allows processors which make use of predicated execution to save a significant amount of code space, issue bandwidth and energy, by compressing predicate register references in a way that makes use of their peculiar temporal distributions. Quadrature low-swing logic is a new logic style which allows significant improvements in efficiency for realising both simple and complex logic functions in modern semiconductor processes. Finally, we describe a high radix on-chip network design which allows low-latency communication to be sustained under high traffic loads despite its simple, bufferless routers. Taken together, these features enable the design of more efficient special purpose multi-core processors, such as Strategist.
| Identifer | oai:union.ndltd.org:ADTP/258476 |
| Date | January 2008 |
| Creators | Madina, Duraid, Computer Science & Engineering, Faculty of Engineering, UNSW |
| Publisher | Publisher:University of New South Wales. Computer Science & Engineering |
| Source Sets | Australiasian Digital Theses Program |
| Language | English |
| Detected Language | English |
| Rights | http://unsworks.unsw.edu.au/copyright, http://unsworks.unsw.edu.au/copyright |
Page generated in 0.0022 seconds