This thesis reports the development of low-cost uncooled microbolometer
focal plane arrays (FPAs) together with their integrated readout circuitry for infrared
night vision applications. Infrared microbolometer detectors are based on suspended
and thermally isolated p+-active/n-well diodes fabricated using a standard 0.35 µ / m
CMOS process followed by a simple post-CMOS bulk-micromachining process.
The post-CMOS process does not require any critical lithography or complicated
deposition steps / and therefore, the FPA cost is reduced considerably. The integrated
readout circuitry is developed specially for the p+-active/n-well diode
microbolometers that provides lower input referred noise voltage than the previously
developed microbolometer readout circuits suitable for the diode type
microbolometers. Two FPAs with 64 × / 64 and 128 × / 128 array formats have been
implemented together with their low-noise integrated readout circuitry. These FPAs
are first of their kinds where such large format uncooled infrared FPAs are designed
and fabricated using a standard CMOS process.
The fabricated detectors have a temperature coefficient of -2 mV/K, a thermal
conductance value of 1.55 × / 10-7 W/K, and a thermal time constant value of 36 ms,
providing a measured DC responsivity (& / #8476 / ) of 4970 V/W under continuous bias. The
measured detector noise is 0.69 µ / V in 8 kHz bandwidth, resulting a measured
detectivity (D*) of 9.7 × / 108 cm& / #8730 / Hz/W. The 64 × / 64 FPA chip has 4096 pixels
scanned by an integrated 16-channel parallel readout circuit composed of low-noise
differential transconductance amplifiers, switched capacitor integrators, and
sample-and-hold circuits. It measures 4.1 mm × / 5.4 mm, dissipates 25 mW power,
and provides an estimated NETD value of 0.8 K at 30 frames/sec (fps) for an f/1
optics. The measured uncorrected voltage non-uniformity for the 64 × / 64 array after
the CMOS fabrication is 0.8 %, which is reduced further down to 0.2 % for the
128 × / 128 array using an improved FPA structure that can compensate for the fixed
pattern noise due to the FPA routing. The 128 × / 128 FPA chip has 16384
microbolometer pixels scanned by a 32-channel parallel readout circuitry. The
128 × / 128 FPA measures 6.6 mm × / 7.9 mm, includes a PTAT temperature sensor
and a vacuum sensor, dissipates 25 mW power, and provides an estimated NETD
value of 1 K at 30 fps for an f/1 optics. These NETD values can be decreased below
350 mK with further optimization of the readout circuit and post-CMOS etching
steps. Hence, the proposed method is very cost-effective to fabricate large format
focal plane arrays for very low-cost infrared imaging applications.
| Identifer | oai:union.ndltd.org:METU/oai:etd.lib.metu.edu.tr:http://etd.lib.metu.edu.tr/upload/4/698597/index.pdf |
| Date | 01 January 2003 |
| Creators | Eminoglu, Selim |
| Contributors | Akin, Tayfun |
| Publisher | METU |
| Source Sets | Middle East Technical Univ. |
| Language | English |
| Detected Language | English |
| Type | Ph.D. Thesis |
| Format | text/pdf |
| Rights | To liberate the content for public access |
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