Semiconductor technology has already got into nanometer scale. As the dimension keeping scaling down, we can get more transistor in the same area, and furthermore the frequency and performance are also enhanced. But nowadays the development of the lithography technology has come to the neck; we must find another way to improve the performance of transistor. In this study, we fully discuss the electrical characteristics and the low temperature effect as the channel of the N-MOSFET being strained.
In order to strain the channel, silicon substrate is bent by applying external mechanical stress, the lattice of channel will be strained after applying uni-axial tensile stress. Therefore, we had improved successfully drain current and carrier mobility of NMOS, and the increasing rates are 9% and 12% respectively.
In addition, we can understand the influence of low temperature effect on strain silicon by bending silicon substrate with external mechanical stress. It is great that there is no general normal single crystalline silicon to come instead in the change to temperature of Mobility and operate-current. This is this experiment was worth probing into.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0724107-203547 |
| Date | 24 July 2007 |
| Creators | Lo, Cheng-wei |
| Contributors | Ying-lang Wang, Ting-chang Chang, Tzu- ming Chang, Po-tsun Liu |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0724107-203547 |
| Rights | not_available, Copyright information available at source archive |
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