Abstract:
This thesis is concerned with the acquisition of body signals using a sampling system. A typical
application is the recording of the electrocardiogram (ECG). It is proposed to sample the input
signal at different rates, depending on the momentary signal content. If the input signal has large
voltage variation, it is sampled at a high rate. During periods of small variation, the signal is
sampled at a lower frequency to save both memory and power. An analog controller to control the
clock rate is proposed and implemented. The analog controller decides the sample frequency (high
rate or low rate) depending on the input signal. The analysis of the proposed system is presented in
this thesis. Furthermore, a working prototype is implemented using discrete components on a PCB.
The measured results show a significant reduction in the average sample frequency and data rate of
50% and 35%, respectively. Finally, the critical analog circuit blocks of the system suitable for
integration on chip are proposed and implemented in a 0.35£gm CMOS process. Measured results
are reported to confirm the functionality of the blocks.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0811108-180420 |
| Date | 11 August 2008 |
| Creators | Chen, Hsin-Yu |
| Contributors | Jia-Jin Chen, Robert Rieger, Chua-Chin Wang, Ya-Hsin Hsueh |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811108-180420 |
| Rights | not_available, Copyright information available at source archive |
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