High-speed systems and mobile systems are the main trends of the IC developments in these years. A high-speed system must have high-speed calculation units, such as CPUs and DSPs, and high speed memories.
A high speed P-latch N-drive 4-T SRAM cell using the dual
threshold voltage transistors is proposed in thesis. The high-Vth transistors are used to construct data storage latches, and the low-Vth transistors are used to improve driving capability and speed. Meanwhile, a DLL-based
frequency multiplier which can provide the high speed clocks in the high speed SRAMs is also proposed. Besides a current mirror, the rest of the DLL-based frequency multiplier is a purely digital logic, which in turn
eliminates the noise prone problem.
Modern mobile systems usually demand a fast frequency hopping and a precise modulation. We introduce a novel method utilizing the trigonometric quadruple angle formula to reduce the spurious tones of the DDFSs, which can serve as a cosine function generator for the mobile systems. The proposed DDFS has a very high resolution. The fast frequency hopping can be achieved by the DDFS and the frequency multiplier serving a local oscillator.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0927105-160430 |
| Date | 27 September 2005 |
| Creators | Tseng, Yih-Long |
| Contributors | Bin-Da Liu, Shen-Fu Hsiao, Ming-Hwa Shew, Tzyy-Sheng Horng, Shih-Chang¡@Hsia¡@, Chua-Chin Wang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0927105-160430 |
| Rights | not_available, Copyright information available at source archive |
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