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VHDL modeling and simulation of a digital image synthesizer for countering ISAR /

Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, June 2003. / Thesis advisor(s): Douglas J. Fouts, Phillip E. Pace. Includes bibliographical references (p. 143-144). Also available online.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/52857266
Date January 2003
CreatorsKantemir, Ozkan.
PublisherMonterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
Source(20.42 MB)

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