This thesis describes the design of a RISC architecture
for high speed data acquisition. The structure of existing
data acquisition systems is first examined. An instruction
set is created to allow the data acquisition system to serve
a wide variety of applications. The architecture is designed
to allow the execution of an instruction each clock cycle.
The utility of the RISC system is illustrated by
implementing several representative applications.
Performance of the system is analyzed and future enhancements
discussed. / Graduation date: 1992
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/37001 |
| Date | 12 November 1991 |
| Creators | Gribble, Donald L. |
| Contributors | Herzog, James H. |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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