Jitter is defined as timing uncertainties of digital signals at their intended
ideal positions in time. While it undermines valuable clock budget and
limits the maximum clock frequency in I/O circuitry, it is one of the most difficult
parameters to measure accurately due to the small value and randomness.
This thesis proposes a random jitter RMS measurement method using AND
and OR operations, which targets BIST applications.
This thesis is organized as follows. Chapter 1 introduces the motivation
of the proposed work. It includes a comparison between two major approaches
to jitter measurement. Chapter 2 explains the proposed random jitter estimation
method in detail. Chapter 3 describes circuit implementations with
design considerations. Chapter 4 demonstrates estimation results from circuit
level simulation runs. Chapter 5 discusses the source of error in the jitter
estimation and concludes. / text
| Identifer | oai:union.ndltd.org:UTEXAS/oai:repositories.lib.utexas.edu:2152/ETD-UT-2009-12-646 |
| Date | 21 September 2010 |
| Creators | Lee, Jae Wook, 1972- |
| Contributors | Abraham, Jacob A. |
| Source Sets | University of Texas |
| Language | English |
| Detected Language | English |
| Type | thesis |
| Format | application/pdf |
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