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A versatile automated system for the mapping of VHDL algorithms onto multiple FPGA-SRAM modules

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1. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.337006

Identifer	oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:337006
Date	January 1996
Creators	Acock, Steven John Blackmore
Publisher	University of Kent
Source Sets	Ethos UK
Detected Language	English
Type	Electronic Thesis or Dissertation