by Kelvin Cheung Ka Wai. / Thesis submitted in: June 1997. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1998. / Includes bibliographical references. / ACKNOWLEDGEMENTS --- p.i / ABSTRACT --- p.ii / TABLE OF CONTENTS --- p.iii / LIST OF FIGURES --- p.vi / TIST OF TABLES --- p.viii / Chapter 1. --- INTRODUCTION --- p.1-1 / Chapter 1.1 --- Introduction --- p.1-1 / Chapter 1.2 --- Objective --- p.1-1 / Chapter 1.3 --- Static CMOS Logic and Dynamic Logic --- p.1-1 / Chapter 1.3.1 --- static CMOS logic circuit --- p.1-1 / Chapter 1.3.2 --- Dynamic logic --- p.1-2 / Chapter 1.4 --- Power Consumption in Static CMOS Integrated Circuit --- p.1-4 / Chapter 1.4.1 --- Static power dissipation --- p.1 -4 / Chapter 1.4.2 --- Dynamic power dissipation --- p.1 -6 / Chapter 1.4.2.1 --- Short circuit current --- p.1 -6 / Chapter 1.4.2.2 --- Charging and discharging of load capacitances --- p.1-6 / Chapter 1.4.2.3 --- Total power consumption --- p.1-8 / Chapter 1.5 --- Adiabatic Logic --- p.1-8 / Chapter 1.5.1 --- Low power electronics --- p.1-8 / Chapter 1.5.2 --- History of adiabatic logic --- p.1 -9 / Chapter 1.6 --- Resources --- p.1-10 / Chapter 1.6.1 --- Computing instrument --- p.1-10 / Chapter 1.6.2 --- CAD tools --- p.1-10 / Chapter 1.6.3 --- Fabrication --- p.1-11 / Chapter 1.7 --- Organisation of the Thesis --- p.1-11 / Chapter 2. --- BACKGROUND THEORIES --- p.2-1 / Chapter 2.1 --- Limit of energy dissipation --- p.2-1 / Chapter 2.2 --- Reversible Electronics --- p.2-1 / Chapter 2.2.1 --- Reversibility --- p.2-1 / Chapter 2.2.2 --- Adiabatic Switching --- p.2-3 / Chapter 2.2.2.1 --- Conventional Charging --- p.2-3 / Chapter 2.2.2.2 --- Adiabatic Charging --- p.2-4 / Chapter 2.2.3 --- Reversible devices --- p.2-5 / Chapter 2.3 --- Compatibility to CMOS Logic --- p.2-6 / Chapter 3. --- ADIABATIC QUASI-STATIC CMOS --- p.3-1 / Chapter 3.1 --- Swinging between 0 and 1 by Harmonic Motion --- p.3-1 / Chapter 3.1.1 --- Starting from a simple pendulum --- p.3-1 / Chapter 3.1.2 --- Inductor-capacitor oscillator --- p.3-2 / Chapter 3.2 --- Redistribution of Charge --- p.3-3 / Chapter 3.3 --- Adiabatic Quasi-static Logic --- p.3-4 / Chapter 3.3.1 --- False reversible inverter --- p.3-4 / Chapter 3.3.2 --- Adiabatic inverter --- p.3-5 / Chapter 3.3.3 --- Effective capacitance --- p.3-7 / Chapter 3.3.4 --- Logic alignment --- p.3-8 / Chapter 3.3.5 --- Cascading the adiabatic inverters --- p.3-10 / Chapter 3.3.5.1 --- Compensated cascading --- p.3-10 / Chapter 3.3.5.2 --- Balanced cascading --- p.3-11 / Chapter 3.4 --- Frequency Control --- p.3-12 / Chapter 3.5 --- Compatibility of AqsCMOS with Static CMOS Logic --- p.3-13 / Chapter 4. --- ADIABATIC QUASI-STATIC CMOS INVERTERS --- p.4-1 / Chapter 4.1 --- Design --- p.4-1 / Chapter 4.1.1 --- Realisation of current direction control device --- p.4-1 / Chapter 4.1.2 --- Implementation of AqsCMOS inverter by current direction control device --- p.4-2 / Chapter 4.1.3 --- Layout --- p.4-3 / Chapter 4.1.3.1 --- Horizontal Transistor Diode --- p.4-3 / Chapter 4.1.3.2 --- Transistor pair --- p.4-9 / Chapter 4.2 --- Capacitance Calculation --- p.4-9 / Chapter 4.2.1 --- Non-switching device --- p.4-10 / Chapter 4.2.2 --- Switching device --- p.4-11 / Chapter 4.3 --- Clocking Scheme --- p.4-13 / Chapter 4.4 --- Energy Loss of AqsCMOS inverter --- p.4-14 / Chapter 5. --- ADIABATIC CLOCKS GENERATOR --- p.5-1 / Chapter 5.1 --- Introduction --- p.5-1 / Chapter 5.2 --- Full Adiabatic Clocks Generator --- p.5-1 / Chapter 5.2.1 --- Sizes of the transistors used --- p.5-2 / Chapter 5.2.2 --- Energy consumption of full adiabatic clocks generator --- p.5-3 / Chapter 5.3 --- Half Adiabatic Clocks Generator --- p.5-4 / Chapter 5.3.1 --- Transistor sizing --- p.5-5 / Chapter 5.3.2 --- Energy consumption of the half adiabatic clock generator --- p.5-5 / Chapter 5.3.3 --- Weakness of the half adiabatic clocks generator --- p.5-6 / Chapter 5.4 --- Automatic Adiabatic Clocks Generator --- p.5-6 / Chapter 5.4.1 --- Operation of automatic adiabatic clocks generator --- p.5-7 / Chapter 5.4.2 --- Energy consumption of automatic adiabatic clocks generator --- p.5-9 / Chapter 6. --- EVALUATION --- p.6-1 / Chapter 6.1 --- Introduction --- p.6-1 / Chapter 6.2 --- Simulation Results --- p.6-1 / Chapter 6.2.1 --- Adiabatic clocks generators --- p.6-1 / Chapter 6.2.2 --- Adiabatic quasi-static CMOS inverters --- p.6-4 / Chapter 6.2.2.1 --- Functional evaluation --- p.6-4 / Chapter 6.2.2.2 --- Performance evaluation --- p.6-6 / Chapter 6.3 --- Test Circuit - Pendulum --- p.6-8 / Chapter 6.3.1 --- Layout --- p.6-8 / Chapter 6.3.2 --- Test circuit of pendulum --- p.6-10 / Chapter 6.3.3 --- Module 1 - Full adiabatic clocks generator (fclk) --- p.6-11 / Chapter 6.3.4 --- Module 2 - Half adiabatic clocks generator (hclk) --- p.6-13 / Chapter 6.3.5 --- Module 3 to 5- Adiabatic inverter chains --- p.6-14 / Chapter 6.3.5.1 --- DC characteristics --- p.6-14 / Chapter 6.3.5.2 --- AC characteristics --- p.6-14 / Chapter 6.3.6 --- Power dissipation --- p.6-17 / Chapter 7 --- CONCLUSIONS --- p.7-1 / Chapter 7.1 --- Introduction --- p.7-1 / Chapter 7.2 --- Design --- p.7-1 / Chapter 7.2.1 --- Adiabatic quasi-static CMOS logic --- p.7-1 / Chapter 7.2.2 --- Adiabatic quasi-static CMOS inverters --- p.7-2 / Chapter 7.2.3 --- Adiabatic clocks generator --- p.7-2 / Chapter 7.3 --- Function --- p.7-3 / Chapter 7.4 --- Power Dissipation --- p.7-3 / Chapter 7.5 --- Discussion --- p.7-3 / Chapter 7.6 --- Further Development --- p.7-3 / Chapter 7.7 --- Conclusion --- p.7-4 / Chapter 8. --- REFERENCES --- p.8-1 / APPENDIX I TABLE OF PTN LAYOUT PENDULUM --- p.I-1 / APPENDIX II PHOTOGRAPHS OF PENDULUM --- p.II-1
| Identifer | oai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_322337 |
| Date | January 1998 |
| Contributors | Cheung, Kelvin Ka Wai., Chinese University of Hong Kong Graduate School. Division of Electronic Engineering. |
| Source Sets | The Chinese University of Hong Kong |
| Language | English |
| Detected Language | English |
| Type | Text, bibliography |
| Format | print, 1 v. (various pagings) : ill. ; 30 cm. |
| Rights | Use of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/) |
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