The objective of this thesis is creating interface for the picture generator. The interface generates a VGA signal with possibility of 4bit color depth. The interface controls two chips of one port SRAM IS61 witch is supplied with Digilent Spartan-3 Starter Kit Board and comunicates trought FIFO blocks based on the shift register principle. Graphics interface generates lines and secondary forms, circles and secondary forms, fills area up and controles 2D transformations of picture.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:217930 |
| Date | January 2009 |
| Creators | Vlček, Petr |
| Contributors | Kosina, Petr, Bohrn, Marek |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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