Return to search

TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT

Low dropout regulators (LDOs) are important components for power management in modern integrated circuits. With the continued scaling down of power supply voltage, digital LDOs have become a more attractive design choice since they avoid the difficulty of designing high-gain amplifiers with low voltage. This thesis investigates techniques for both modeling and enhancement of digital LDO transient response. It discusses the importance of the resistance in the output stage of an LDO, and proposes a simulation model for examining LDO transient response. In addition, the thesis studies circuit techniques to improve LDO transient response. Different LDO circuits are implemented and compared in this study.

Identiferoai:union.ndltd.org:siu.edu/oai:opensiuc.lib.siu.edu:theses-2892
Date01 May 2016
CreatorsWest, Paul Martin
PublisherOpenSIUC
Source SetsSouthern Illinois University Carbondale
Detected LanguageEnglish
Typetext
Formatapplication/pdf
SourceTheses

Page generated in 0.0022 seconds