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Optimization of RSA Cryptography for FPGA and ASIC Applications

RSA cryptography is one of the most widely used cryptosystems in the world. FPGA/ASIC implementations for the classic RSA cryptosystem have high resource utilization due to the use of the Extended Euclid's algorithm for MOD inverse generation, the MOD exponent operation for encryption and decryption, and through non finite-field arithmetic. This thesis translates the RSA cryptosystem into the finite-field domain of arithmetic which greatly increases the range of encryption and decryption keys and replaces the MOD exponent with a multiplication. A new algorithm, the SPX algorithm, is presented and shown to outperform Euclid's algorithm, which is the most widely used mechanism to compute the GCD in FPGA implementations of RSA. The SPX algorithm is then extended to support the computation of the MOD inverse and supply decryption keys. Lastly, a finite-field RSA system is created and shown to support character encryption and decryption while being designed to be integrated into any larger system.

Identiferoai:union.ndltd.org:unt.edu/info:ark/67531/metadc1609146
Date12 1900
CreatorsSimpson, Zachary P
ContributorsMehta, Gayatri, Li, Xinrong, Fu, Shengli, Varanasi, Murali
PublisherUniversity of North Texas
Source SetsUniversity of North Texas
LanguageEnglish
Detected LanguageEnglish
TypeThesis or Dissertation
Formatvii, 53 pages, Text
RightsPublic, Simpson, Zachary P, Copyright, Copyright is held by the author, unless otherwise noted. All rights Reserved.

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