Ces dernières années, sont apparues de nombreuses applications, utilisant des données en nombre potentiellement illimité, provenant de façon continue de capteurs distribués afin d'alimenter un serveur central. Les données sont utilisées à des fins de surveillance, de supervision, de déclenchement d'alarmes en temps réel, ou plus généralement à la production de synthèses d'aide à la décision à partir de plusieurs flux. Le volume des données collectées est généralement trop grand pour être entièrement stocké. Les systèmes de gestion de flux de données (SGFD) permettent de gérer facilement, et de façon générique les flux de données : les données sont traitées au fil de l'eau sans les archiver. Toutefois, dans certaines applications, on ne souhaite pas perdre complètement l'ensemble des flux de données afin de pouvoir analyser les données du passé et du présent. Il faut donc prévoir un stockage de l'historique du flux. Nous considérons dans cette thèse, un environnement distribué décrit par une collection de plusieurs capteurs distants qui envoient des flux de données numériques et unidimensionnelles à un serveur central unique. Ce dernier a un espace de stockage limité mais doit calculer des agrégats, comme des sommes ou des moyennes, à partir des données de tout sous-ensemble de capteurs et sur un large horizon temporel. Deux approches sont étudiées pour construire l'historique des flux de données :(1) Echantillonnage spatial en ne considérant qu'un échantillon aléatoire des sources qu'on observe dans le temps ; (2) Echantillonnage temporel en considérant toutes les sources mais en échantillonnant les instants observés de chaque capteur. Nous proposons une méthode générique et optimisée de construction de résumés à partir de flux de données distribués : A partir des flux de données observés à une période de temps t -1, nous déterminons un modèle de collecte de données à appliquer aux capteurs de la période t. Le calcul des agrégats se base sur l'inférence tatistique dans le cas de l'échantillonnage spatial et sur l'interpolation dans le cas de l'échantillonnage temporel. A notre connaissance, il n'existe pas de méthodes d'interpolation qui estiment les erreurs à tout instant et qui prennent en compte le flux de données ou courbe à interpoler et son intégrale. Nous proposons donc deux approches : la première se base sur le passé des courbes pour l'interpolation (approche naive) ; et la seconde utilise à un processus stochastique pour modéliser l'évolution des courbes (approche stochastique).

Computational theories of structure-from-motion and stereo vision only specify the computation of three-dimensional surface information at points in the image at which the irradiance changes. Yet, the visual perception is clearly of complete surfaces, and this perception is consistent for different observers. Since mathematically the class of surfaces which could pass through the known boundary points provided by the stereo system is infinite and contains widely varying surfaces, the visual system must incorporate some additional constraints besides the known points in order to compute the complete surface. Using the image irradiance equation, we derive the surface consistency constraint, informally referred to as no news is good news. The constraint implies that the surface must agree with the information from stereo or motion correspondence, and not vary radically between these points. An explicit form of this surface consistency constraint is derived, by relating the probability of a zero-crossing in a region of the image to the variation in the local surface orientation of the surface, provided that the surface albedo and the illumination are roughly constant. The surface consistency constraint can be used to derive an algorithm for reconstructing the surface that "best" fits the surface information provided by stereo or motion correspondence.

Moving objects may stimulate many retinal photoreceptors within the integration time of the receptors without motion blur being experienced. Anderson and vanEssen (1987) suggested that the neuronal representation of retinal images is shifted on its way to the cortex, in an opposite direction to the motion. Thus, the cortical representation of objects would be stationary. I have measured thresholds for two vernier stimuli, moving simultaneously into opposite directions over identical positions. Motion blur for these stimuli is not stronger than with a single moving stimulus, and thresholds can be below a photoreceptor diameter. This result cannot be easily reconciled with the hypothesis of Tshifter circuitsU.

To counter radio signal reconnaissance, an efficient way of covert communication is to use subsecond duration burst transmissions in the congested HF band. Against this background, the present thesis treats fast direction finding (DF) using antenna arrays with known response only in a few calibration directions. In such scenarios the known method of array mapping (interpolation) may be used to transform the output data vectors from the existing array onto the corresponding output vectors of another (virtual) array that is mathematically defined and optimally chosen. But in signal reconnaissance the emitters are initially unknown and the mapping matrix must be designed as a compromise over a wide sector of DOAs. This compromise may result in large DOA estimate errors, both deterministic and random. Analyzing, analytically describing, and minimizing these DOA errors, is the main theme of the present thesis. The first part of the thesis analyzes the deterministic mapping errors, the DOA estimate bias, that is caused by dissimilarity between the two array geometries. It is shown that in a typical signal reconnaissance application DOA estimate bias can dominate over DOA estimate variance. Using a Taylor series expansion of the DOA estimator cost function an analytical expression for the bias is derived and a first order zero bias condition is identified. This condition is general, estimator independent, and can be applied to any type of data pre-processing. A design algorithm for the mapping matrix is thereafter presented that notably reduces mapped DOA estimate bias. A special version is also given with the additional property of reducing the higher order Taylor terms and thus the residual bias. Simulations demonstrate a bias reduction factor exceeding 100 in some scenarios. A version based on signal subspace mapping rather than array manifold mapping is also given. This version is of large practical interest since the mapping matrix can be designed directly from calibration data. In the second part of the thesis the derived bias minimization theory is extended into Mean Square Error (MSE) minimization, i.e. measurement noise is introduced. Expressions for DOA error variance and DOA MSE under general pre-processing are derived, and a design algorithm for the mapping matrix is formulated by which mapped DOA estimate MSE can be minimized. Simulations demonstrate improved robustness and performance for this algorithm, especially in low SNR scenarios. In the third and final part of the thesis the theoretical results are supported by experimental data. For an 8 element circular array mapped onto a virtual ULA across a 600 sector it is shown that the mapped DOA estimate errors can be suppressed down to the Cramér-Rao level. / QC 20101022

The master thesis is based upon a new type of linear-phase Nyquist finitie impulse responseinterpolator and decimator implemented using a tree-structure. The tree-structure decreasesthe complexity, considerably, compared to the ordinary single-stage interpolator structure.The computational complexity is comparable to a multi-stage Nyquist interpolator structure,but the proposed tree-structure has slightly higher delay. The tree-structure should still beconsidered since it can interpolate with an arbitrary number and all subfilters operate at thebase rate which is not the case for multi-stage Nyquist interpolators.

For target location and tracking in wireless communication systems, mobile target positioning and tracking play an important role. Since multi-sensor system can be used as an efficient solution to target positioning process, more accurate target location estimation and tracking results can be obtained. However, both the deployment of designed multi-sensor and location algorithm may affect the overall performance of position location. In this thesis, based on the time difference of arrival (TDOA), two closed-form least-square location methods, spherical-interpolation (SI) method and spherical-intersection (SX) method are used to estimate the target location. The two location methods are different from the usual process of iterative and nonlinear minimization. The locations of the target and the designed multiple sensors may yield geometric effects on location performance. The constraints and performance of the two location methods will first be introduced. To achieve real-time target tracking, the Kalman filtering structures are used to combine the SI and SX methods. Because these two positioning and tracking systems have different and complementary performance inside and outside the multi-sensor array, we consider using data fusion to improve location estimation results by using interacting multiple model (IMM) based estimator, in which internal filters running in parallel are designed as the SX-KF1 and the SI-KF2. However, due to the time-varying characteristics of measurement noises, we propose an adjusting scheme for measurement noise variance assignment in the Kalman filters to obtain improved location estimation results. Simulation results are obtained by running Matlab program. In three-dimensional multi-sensor array scenarios, the results of moving target location estimation shows that the IMM-based estimators effectively improve the position performance.

In this thesis, a linear interpolation direct digital frequency synthesizer (DDFS) with improved structure to simplify the hardware complexity by correction block is proposed. Correction block is mainly used to compensate for the error curve of linear interpolation DDFS. From the analysis of these error curves, these error curves have similar behavior between each others. After selecting an error curve, the other error curves can be derived and multiplied by a fixed scale. From the simulation results, the correction block using the above method can improve about 12 dB spurious frequency dynamic range (SFDR). The goal of the DDFS designed in this thesis is to achieve 80 dB SFDR. Minimum required number of bits for each block in the proposed DDFS is carefully selected by simulation. In general, DDFS with piecewise linear interpolation theoretically needs 32 segments of piecewise linear interpolation to achieve 84 dB SFDR. In this thesis, 16 segments of piecewise linear interpolation with correction block can achieve the target SFDR. The chip¡¦s simulation is implemented by TSMC standard 0.13um 1P8M CMOS process with core area 78.11 x 77.49 um2.

This paper presents a set of Image Registration, Image Integration, interpolation and image restoration and other technology, the number of low-resolution images synthesized high-resolution image. Relative to the existing image fusion technology, the method provided in this paper has more advantages, such as: (1) high-precision value; (2)low computation cost; (3)a compact system; (4) applicable to noise images; (5) robotic and automatic performance.

Nowadays almost all products used in our daily life are made in pursuit of streamline and good look, including mobiles, motorcycles, aerospace and 3C industry; therefore, how to shorten process time and enhance the smoothness of the product¡¦s surface has become one of the important issues. However, the process method of traditional CNC machines only can support line and circular interpolations but cannot accept motion along curve and circular paths. Therefore, the traditional CNC machines have to rely on CAM, a method to generate the NC code called G-code and M-code by approximating many tiny linear or circular segments, to plan the cutter paths. But this approximating method requires higher transmission speed; it also occupies huge memory capacity and makes the velocity of machine tool discontinuous, in order to difficultly meet the requirement of high speed and better precision. In order to solve the above problems, this thesis adopts the NC code created by CAD/CAM¡¦s NURBS curve which called NURBS-code, making CNC machines have the function of processing NURBS curve interpolations to improve the defect of the traditional processing and thus reach the goal of high speed and better precision. Furthermore, due to NURBS interpolators are always implemented by the controller. This always makes CNC machine become very expensive; meanwhile, adjusting parameters is very troublesome. Therefore this thesis also provides the intergrated method of NURBS and DDA real-time interpolator to make the application in the easy way without the consideration of controller design for AC driver.

A 2.5V 8-bit 100MSample/sec folding and interpolation analog to digital converter is described in this thesis. First, a cascoding folding amplifier is used for improve power consumption. The differential pairs of the folding amplifier are cascoded to reduce the numbers of reference current source, so the power consumption is reduced. In order to reduce more power consumption, we drop the power supply down to 2.5V. However, the power supply is not large enough to keep the folding amplifier working normally and it causes the output signal aberration. Hence, we propose a back-end amplifier to connect the folding amplifier to overcome the problem. Therefore, the power consumption of all circuit is reduced to 15.292mW. Moreover, the capacitive loading at the output of the cascoded differential pairs is smaller than that of conventional cascaded differential pairs, and we employ a distributed folding technique to reduce the folding factors of each folding amplifier. Therefore, we improve the frequency multiplication effect to increase the analog input signal bandwidth. Beside, in order to heave the input signal range of the voltage mode comparator, we employ an n-channel input stage. Because the input signal range of n-channel is higher than that of p-channel input stage. By using these techniques, the input signal bandwidth and the power consumption of overall circuit are improved greatly. The proposed analog to digital converter is designed by TSMC 0.35£gm 2P4M CMOS process, and it operates at 2.5V power supply voltage with 1V to 2.4V reference voltage. The simulation results show that the power consumption is 15.292mW, DNL is +/- 0.55LSB, and INL is 1.7LSB ~ -0.8LSB.