As network bandwidth growing and voice coding enhancing, voice transmitted over the Packet-Based network environment can also have good quality compared to traditional telephone network. Therefore, the IP telephony services having a price advantage could gradually replace the traditional telecommunication services. However, in order to support both the traditional telecommunication services and IP phone services, it requires the devices which are capable of converting analogical telephony information such as voice and fax into packet data suitable for transmitting over IP. We therefore design and implement an IP phone equipment that can make SIP phone calls, and can support the exchange of the analogical traditional telephone voice and the digital voice packets over IP. In the hardware design point of view, we implement an IP phone set device in an embedded development platform using Infineon EASY5120 development kit, which uses a digital signal processor, called Vinetic®-2CPE (part number is PEB3332), to handle voice encoding and decoding, e.g., G.711 u/A law and G.723 compression, and RTP encapsulation and decapsulation. In the software architecture, we choose Linux as our embedded operation system under which there are lots of GNU open source software to feed our need and further to develop our own software components. In the process of this implementation, the software and hardware co-design takes up most of time, and we also face some VoIP application problems, e.g., SIP. We try to build up a VoIP system to figure out and solve these problems. And we hope that this actually applicable VoIP embedded system can be used as a testbed and verifying platform for VoIP applications.

High-performance reconfigurable computing has demonstrated its potential to accelerate demanding computational applications. Thus, the current trend is towards combining the microprocessor with the power of reconfigurable hardware in embedded system research area. However, integrating hardware and software that is the interface of communication is challenging. In this thesis, we present a methodology flow to improve the cohesion between hardware and software for reconfigurable embedded system design through IRES (I-link for Reconfigurable Embedded System), Hardware-Software integration platform. In IRES, we set up the platform and produce the Executor through I-link (Hardware-Software Integration Link). The Executor consists of tasks and hardware bitstreams which are provided by user design, bootloader and operation system which are provided by system, and PSPs (Program Segment Prefix) which are from the files given above. We initial the system through bootloader which will scan the PSPs of Executor to construct Task Control Block (TCB), Hardware Control Block (HCB) and Netlist IP Information Block (NIB) data structure. User can get the hardware information from those data structures, and communicate with hardware by using simple functions like ¡§read()¡¨ and ¡§write()¡¨. Then, the system transmits the data to and from multi-hardware through Hardware Management Unit (HMU) which also has data buffering ability. Finally, we successfully accomplish IRES Hardware-Software integration platform in HSCP, which is developed in our laboratory, and verify the feasibility of communication between hardware and software.

De nos jours, les systèmes embarqués temps-réels critiques intègrent de plus en plus de composants, et voient leur complexité augmenter. Les systèmes avioniques ont suivi cette évolution, voyant augmenter leurs processus de développement. Dès lors, les développeurs de plates-formes avioniques se sont tournés vers les méthodes de modélisation en avance de phase (i.e. en tout début de cycle de développement), afin d’anticiper les performances de celles-ci et aider à leur dimensionnement. Particulièrement, l’exploration de l’utilisation des ressources matérielles de la plate-forme par la partie applicative (l’ensemble des applications) est le point central de cette exploration des performances. Si les méthodes de modélisation actuelles offrent la possibilité de modéliser une plate-forme depuis les exigences jusqu’au niveau architectural, elles ne sont pas encore adaptées à la modélisation comportementale. Elles ne permettent donc pas l’étude du comportement et la comparaison de différentes architectures d’une plate-forme en avance de phase. Mes travaux de thèse ont pour but d’offrir un processus de modélisation et simulation de plate-forme avionique répondant à cette problématique. L’objectif est de compléter les méthodes de modélisation actuelles pour apporter une analyse plus fine des performances d’une plate-forme en avance de phase, et les comparer avec les exigences. Pour cela, nous proposons une approche en quatre étapes : i) une étape de modélisation des applications et d’extraction des stimuli applicatifs ; ii) une étape de modélisation architecturale du système basée sur AADL (Architecture Analysis and Design Language) et son annexe ARINC653 ; iii) une étape de génération d’un modèle comportemental de la partie matérielle et intergicielle du système en SystemC-TLM ; iv) une étape de simulation et d’analyses, où les stimuli applicatifs sont exécutés par le modèle comportemental, et les performances extraites comparées aux exigences système. Enfin, nous avons validé notre méthode sur un cas d’étude avionique que nous présenterons également. / Nowadays, real-time critical embedded systems are more and more complex due to an increase of the integrated components. Following that trend, avionic systems development complexity increases too. So early modeling processes are more and more used in order to anticipate on plat-forms performance and help sizing them. Particularly, hardware resources usage exploration is a key aspect for performance exploration. Current processes allow to model avionic platform from requirements to architectural level of abstraction, but they do not allow to model a behavioral avionic platform. Thus, they do not allow to explore the hardware resources usage of the platform, neither to compare some alternatives of architectures at early phase of development cycle. My PhD work presents our avionic platform modeling and simulation process that answer that problem. The goal is to complete current modeling processes to offer more accurate early performance analysis, and compare them with the system requirements. For that, we propose a for steps method : i) an application modeling and stimuli extraction step ; ii) an architectural modeling step, based on the AADL (Architecture Analysis and Design Language) and its ARINC653 annex ; iii) a behavioral execution platform model (hardware and middleware) generation step with SystemC-TLM ; iv) a simulation and analysis step, when performance are compared with system requirements. At last, we will present our validation part on an avionic case study.

To the general purpose microprocessors, we often need to change microprocessors¡¦ hardware architecture because of customized purpose. But already existing application program is incompatible to the new hardware architecture, and increase the product¡¦s development period. In this thesis, we discuss the modification of two kinds of hardware architecture, include new instruction set extension and change the size of datapath to deal with specific application. To the former, our laboratory develop a 32-bit microprocessor SYS32-TM, increase MME instruction set to deal with multimedia application. The latter, based on Thumb instruction set , we develop 16-bit microprocessor SYS16-TM, we modify its¡¦ datapath from 32-bit to 16-bit, we will show how to let already existing application program can execute on the new hardware architecture. In SYS32-TM, we use the way of inline assembly to embedded MME instruction set in C source code, we have to modify the assembler, define and parse the MME instruction set, so the assembler can recognize it. In SYS16-TM, we have sign extension and address offset problems, we have to modify the compiler backend¡¦s machine description to solve the sign extension and address offset instruction set behavior, and modify the library. To build SYS16-TM software environment, we have to set C Run Time Environment in Thumb mode, not support exchange between ARM mode and Thumb mode, and write the correct linker script, to set the program start address in 0x0000, to solve ARM¡¦s initial program start address in 0x8000. As a result, In SYS32-TM, we use assembler to identify the MME instruction set can embedded in existing C source code. In SYS16-TM, we execute the testbench include sorts, Hanoi, Fibonacci number etc, and use simulator to verify its¡¦ correctness.

Theories in operating systems are relatively matured, but implementations are hard compared to many areas in computer science. For example, virtual memory has been around for more than 20 years since its introduction, but, to understand how an operating system supports virtual memory is not a trivial task, let alone implementation. Minix is an operating system that has been designed for educational purpose. It¡¦s a good starting point for a novice who wants to learn operating systems. The third version of Minix has been moved towards a true microkernel design and targeted at small computers and embedded systems. The advantages of microkernel architecture is its high fault tolerance and high modularity design which can make it much more flexible for versatile applications on embedded systems. However, to the best of our knowledge, Minix 3 only runs on Intel-based machine so far. The objective of this thesis is thus to port Minix 3 to ARM-Based embedded systems, to make it an experimental microkernel for embedded systems. Also, due to the incompatibility between the segmented memory model used by Minix 3 on IA-32 and the unsegmented memory model support by ARM, we also provide an API to simplify the porting effort.

VoIP(Voice over IP) is one of the most important applications on the Internet. As the voice coding enhancing, VoIP provides a good voice quality with low bandwidth. Therefore, the IP telephony services have a price advantage with PSTN. In the near future, VoIp may replace with the PSTN to provide a better telephony service. In this paper, we discuss how to design and implement an embedded VoIp user agent system. With the help of DSP(Digital Signal Processor), we speed up the voice data processing. We use Linux as the embedded operating system and other open source library to implement a VoIP user agent base on SIP(Session Initiation Protocol) standard. With the hardware and software co-design, we build up an embedded VoIP Integrated Access Device.

International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / Embedded GIS in Intelligent Navigation System is a special information system. This paper puts forward several basic principles and constraints during design for Embedded GIS at first, and then analyzes the feature of embedded platform and the function of Intelligent Navigation System, and presents a realization scheme of Embedded GIS.

International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / This paper introduces the essential points for designing a navigating system, and describes the modules of a typical vehicle navigator. This paper also gives a practical navigator example. Some experience for design is also mentioned.

This thesis presents a new cross-platform graphics performance tool, GPTT (Graphics Performance Tuning Tool), which is designed for helping developers to find the performance bottleneck of their games or applications on embedded systems. The functions of performance tool are embedded into the standard graphics library, OpenGL ES, to achieve cross-platform. In order to verify the proposed tool, we also implement the OpenGL ES specification in addition to the tool itself. The performance tool is separated into visualization part and measurement part from which it successfully decreases the load in embedded system, while running the application. Via the tool it identifies many bottlenecks that can be improved.

Instead of using the public switched telephone network, VoIP (Voice-over-IP) services exchange voice information over Internet. Therefore, VoIP can services with their advantage of low rates. SIP (Session Initiation Protocol) is scalable, easy to implement, and requires less setup time than its predecessor protocols. Therefore, SIP becomes one of the major signaling protocols used in VoIP. SIP uses Client-Server architecture which is simple and easy to maintain. But Client-Server architecture may cause problems while the clients increase. For the reason, IETF (The Internet Engineering Task Force) drafts discusses using P2P (Peer-to-Peer) architecture in SIP protocol to avoid the weaknesses of Client-Server architecture, and hopes to provide good voice quality by using P2P architecture. In this paper, we discuss how to design and implement an embedded P2PSIP(Peer-to-Peer Session Initiation Protocol) user agent based on SIP standard. First, we analyze all kind of the major P2P structures, and discuss the advantage and disadvantage of them. Second, our design needs to consider the embedded systems which have limited resources. Using cache is a good solution. Finally, we confront the problem and try to solve it.