<p> Many industries have legacy software systems which are definitely important to them but are however, difficult to maintain due to a lack of understanding of those systems. This occurs as a result of inadequate or inconsistent documentation. Although the costs of redesigning the system may be large, some organizations still plan to reverse engineer the software specification documents from the code to alleviate a large burden from such endeavour. This thesis provides an incremental and modular approach to create a process and tools to extract the semantics of legacy assembly code.</p> <p> Our techniques consist of static analysis and symbolic interpretation in order to reverse engineer the semantics of legacy software. We examine the case of IBM-1800 programs in detail. From the abstract model of the operational semantics of IBM-1800, we simultaneously obtain an emulator and a symbolic analysis process. Augmented with control flow information, we can use the symbolic analysis to provide complete semantics for the code sequences of interest. We can also generate Data Flow Graphs to depict the flow of data in those code segments. The whole process of extracting semantic information from the assembler codes is fully automated with only a little human intervention at the initial step.</p> <p> We use Haskell as our implementation language and its important features help us to create modular and well structured software. The literate programming documentation style in this thesis increases the readability and consistency of the implementation's documentation.</p> <p> The process and the associated tools created in this thesis are used in a large reverse engineering project, which has a goal to extract requirements specification from legacy assembly code. This project is funded jointly by Ontario Power Generation (OPG) and CITO (Communications and Information Technology Ontario).</p> / Thesis / Master of Applied Science (MASc)

Magister Scientiae - MSc / Computer architecture and assembly language programming microprocessor execution are basic courses taught in every computer science department. Generally, however, students have difficulties in mastering many of the concepts in the courses, particularly students whose first language is not English. In addition to their difficulties in understanding the purpose of given instructions, students struggle to mentally visualize the data movement, control and processing operations. To address this problem, this research proposed a graphical visualization approach and investigated the visual illustrations of such concepts and instruction execution by implementing a graphical visualization simulator as a teaching aid. The graphical simulator developed during the course of this research was applied in a computer architecture course at Kabul University, Afghanistan. Results obtained from student evaluation of the simulator show significant levels of success using the visual simulation teaching aid. The results showed that improved learning was achieved, suggesting that this approach could be useful in other computer science departments in Afghanistan, and elsewhere where similar challenges are experienced. / South Africa

The master thesis discusses the design of an emulator of a CPU architecture instruction set aimed at assembly languages course. While most of nowadays emulators are architecture specific, the emulator proposed in master thesis aims at education and better understanding of assembly languages. The emulator is not limited to a single CPU, but it easily allows defining a purpose-specific architecture and instruction set in order to perform operations upon it and to display its current state.

The Altair 680b Cross-Assembler is a program written in the Nova Assembly Language. It can be used to assemble Altair 680b assembly language programs. The object code can be punched on paper-tape for execution on the Altair 680b microcomputer. This report describes the design and working of the Cross-Assembler. A program listing and a few sample runs are also included. / Thesis / Master of Science (MSc)

This thesis describes a software implementation of the IEEE Floating-Point Standard (IEEE Task P754), which is believed to be an effective system for reliable, accurate computer arithmetic. The standard is implemented as a set of procedures written in Motorola 6809 assembly language. Source listings of the procedures are contained in appendices.

This thesis describes a set of computer program control structures which permits the application of certain structured programming techniques to the IBM/360 assembly language (ALC). The control structures are implemented by programmerdefined instructions known as macros. A history of computer software is presented, providing a basis for the emergence of structured programming. A survey of the major concepts of structured programming with special attention to control structures and their significance to structured programming follows. The macros developed in this study include DO, ENDDO, LEAVE, CASE, and ENDCASE. They provide a looping control structure, a loop-escape construct, and a selective control structure. Examples of usage are given.

The problem with which this investigation is concerned is an analysis of errors in looping and assignment made by novice assembly language computer programmers. This analysis is made after subjects write three computer programs. The verbal definition of the problem for each program specifies, without naming, either a for, while, or repeat looping structure. The purposes of the study are the following; to determine whether using the appropriate looping structure is related to writing a correct program; to determine the incidence of assignment errors in incorrect programs; to determine the degree of relationship between mathematical aptitude, and the type of assignment errors made; to determine the degree of relationship between use of the appropriate looping structure and mathematical, verbal, and scholastic aptitude; to determine the degree of relationship between gender and use of the appropriate looping structure, and to determine the degree of relationship between gender and the number of assignment errors.

<p>Fully homomorphic encryption allows computations to be made on encrypted data without decryption, while preserving data integrity. This feature is desirable in a variety of applications such as banking, search engine and database querying, and some cloud computing services. Despite not knowing the plaintext content of the data, a remote server performing the computation would still be aware of the functions being applied to the data. To address the issue, this thesis proposes a method of encrypting circuits and executing encrypted instructions, by combining fully homomorphic encryption and digital logic theory. We use the classic RISC Archtecture as a foundation of our work, and the result of our algorithm is essentially an encrypted programming language, where a remote server is capable of executing program code that was written and encrypted by a local client.</p> / Master of Science (MS)

It is widely recognised that security is a concern in the design of a wide range of embedded systems. However, security for embedded systems remains an unsolved problem, which could create greater challenges in the future than security for mainstream computers today. The promise of universal connectivity for embedded systems creates increased possibilities for malicious users to gain unauthorised access to sensitive information. All modern security protocols use private-key and public-key algorithms. This thesis investigates three important cryptography algorithms (RC4, AES, and RSA) and their relevance to networked embedded systems. Limitations in processing power, battery life, communication bandwidth, memory and costs constrain the applicability of existing cryptography standards for small embedded devices. A mismatch between wide arithmetic for security (32 bit word operations) and embedded data bus widths (often only 8 or 16 bits) combined with a lack of certain operations (e. g., multi precision arithmetic) highlight a gap in the domain of networked embedded systems security. The aim of this thesis is to find feasible security solutions for networked embedded system applications. The above mentioned cryptography algorithms have been ported to three hardware platforms (Rabbit RCM3000, Xilinx Virtex 4 FPGA with MicroBlaze softcore, and a Linux desktop machine) in order to simulate several real world scenarios. Three applications – bidirectional transmission with encryption and decryption for various payload length, unidirectional transmission with very short payload, and encrypted data streaming – were developed to meet the simulation requirements. Several timing results were collected and used for calculating the achieved throughput. The Rabbit hardware platform, which represents the lower end in this thesis, was able to perform the RC4 crypto algorithm with a throughput of about 155 kbit/s. Thus the RC4 crypto algorithm was proven to outperform the AES crypto algorithm by a factor of 5, with AES achieving a throughput of about 32 kbit/s with the same hardware platform. The throughput was similar with the streaming application and UDP data transport. Without performing a cryto algorithm, the streaming application was able to process up to 1.5 Mbit/s. RSA was not implemented on the Rabbit hardware platform. The MicroBlaze hardware platform outperformed the Rabbit system by a factor of 5 – 10. It reached a throughput up to 1.5 Mbit/s with RC4 and up to 130 kbit/s with AES. The RSA algorithm reached up to 0.8 kbit/s on this hardware platform, showing that public-key ciphers are only suitable for short payload data, such as the exchange of a session key. The Linux machine was included in this test only to provide a reference to a non embedded system. The Linux performance was better than the MicroBlaze system by a factor of between 67 – 770, and better than the Rabbit platform by a factor of between 645 – 3125. Both the RC4 and the AES crypto algorithm reached a throughput of up to 100 Mbit/s on the Linux machine, with a throughput of up to 130 kbit/s reached with RSA. Hence, the Rabbit platform combined with the RC4 algorithm is suitable, for example, for MP3 streams with up to 150 kbit/s. The Rabbit platform with the AES algorithm could be used for low quality audio streams, for example for speech announcements. If a higher throughput is required, for example for video streams, the MicroBlaze could be an appropriate platform with throughput of up to 1.5 Mbit/s. Low cost embedded systems like Atmel AVR are not suitable for processing cipher algorithms developed in C. It is widely recommended that assembly language is used to develop such platforms.

Main topic of this thesis is Win32 application programming interface and symbolic instructions programming language. It can be divided into four parts. First part sums the basics of 32-bit programming in symbolic instructions language in Windows. Second part describes the Win32 resources for computer intercommunication. Third part presents, describes and comments selected problems in symbolic instructions language.Last part covers a creation of an example application. This application and its parts will be the content of computer exercises in VUT Brno FEEC subject Počítače a jejich periferie.