No description available.

Data transfer rates on printed circuit boards are quickly approaching speeds that challenge the limits of todays technology. Inter-chip communication has increased dramatically. Currently data rates have reached 3.125 Gb/s on standard circuit board, but chip-to-chip digital communication has currently reached a plateau and several problems need to be addressed to significantly increase data transfer rates. Inductive and capacitive components of far end crosstalk (FEXT) conveniently cancel each other as they propagate on an interconnect transmission line, however the inductive and capacitive components of near end crosstalk(NEXT) add together and interfere with signals on adjacent receivers.<p>This paper proposes a novel solution for canceling crosstalk by adding extra circuitry to the receiver within the integrated circuit. This digital circuit delivers one of three appropriate levels of crosstalk compensation to the incoming signal. Since the circuit is digital, simple blocks can be used to implement it on a complimentary metal-oxide semiconductor (CMOS) integrated circuit and consume very little extra silicon.<p>This paper presents the compensation circuit and reports the results of the simulations, which demonstrate improved performance over the standard system. The compensation circuit is specifically aimed at adjacent input and output lines on a microchip. Simulations of a typical circuit board configuration operation have shown crosstalk that is only 15 dB lower than a received attenuated signal. The crosstalk cancellation circuit has been shown to improve this by as much as 10 dB.

Data transfer rates on printed circuit boards are quickly approaching speeds that challenge the limits of todays technology. Inter-chip communication has increased dramatically. Currently data rates have reached 3.125 Gb/s on standard circuit board, but chip-to-chip digital communication has currently reached a plateau and several problems need to be addressed to significantly increase data transfer rates. Inductive and capacitive components of far end crosstalk (FEXT) conveniently cancel each other as they propagate on an interconnect transmission line, however the inductive and capacitive components of near end crosstalk(NEXT) add together and interfere with signals on adjacent receivers.<p>This paper proposes a novel solution for canceling crosstalk by adding extra circuitry to the receiver within the integrated circuit. This digital circuit delivers one of three appropriate levels of crosstalk compensation to the incoming signal. Since the circuit is digital, simple blocks can be used to implement it on a complimentary metal-oxide semiconductor (CMOS) integrated circuit and consume very little extra silicon.<p>This paper presents the compensation circuit and reports the results of the simulations, which demonstrate improved performance over the standard system. The compensation circuit is specifically aimed at adjacent input and output lines on a microchip. Simulations of a typical circuit board configuration operation have shown crosstalk that is only 15 dB lower than a received attenuated signal. The crosstalk cancellation circuit has been shown to improve this by as much as 10 dB.

Thesis (Ph. D.)--Virginia Polytechnic Institute and State University, 1990. / Vita. Abstract. Includes bibliographical references (leaves 162-174). Also available via the Internet.

Thesis (M.Eng.)(Bioengineering)--University of Pretoria, 2005. / Title from opening screen (viewed March 22, 2006). Includes summaries in English and Afrikaans. Includes bibliographical references.

No description available.

In the BGA family package, plating bars must be added in the manufactured processing , However they will cause discontinuities[1]¡Bradiation effect[2] and bad transmission efficiency[3]~[6].This paper considers the signal transmission problem caused by the couple plating lines. This thesis starts from analyzing the different terminations of the couple lines, then proposes a novel L-stub element structure which can decrease the crosstalk noise efficiently on the plating lines. Discussion of the L-stub length ratio, L-stub position and the numbers of the L-stub then provides the useful range. The basic idea is to use the reflection of source to cancel the original couple and doesn¡¦t have to add additional element. In addition, it compares well with other methods which are also designed for reducing crosstalk and circuits are implemented to prove our design. Last of all, using the eye diagram to manifest the signal quality improvement.

Increasing relative semiconductor process variations are making the prediction of realistic worst-case integrated circuit delay or sign-off yield more difficult. As process geometries shrink, intra-die variations have become dominant and it is imperative to model them to obtain accurate timing analysis results. In addition, intra-die process variations are spatially correlated due to pattern dependencies in the manufacturing process. Any statistical static timing analysis (SSTA) tool is incomplete without a model for signal crosstalk, as critical path delays can increase or decrease depending on the switching of capacitively coupled nets. The coupled signal timing in turn depends on the process variations. This work describes an SSTA tool that models signal crosstalk and spatial correlation in intra-die process variations, along with gradients and inter-die variations.

Thesis (Ph.D.)--Tufts University, 1995. / Submitted to the Dept. of Electrical Engineering. Includes bibliographical references (leaves 237-253). Access restricted to members of the Tufts University community. Also available via the World Wide Web;

Thesis (M.Phil.)--Hong Kong University of Science and Technology, 2007. / Includes bibliographical references. Also available in electronic version.