Thesis (M.Sc.)--York University, 2005. Graduate Programme in Computer Science. / Typescript. Includes bibliographical references (leaves 123-126). Also available on the Internet. MODE OF ACCESS via web browser by entering the following URL: http://gateway.proquest.com/openurl?url%5Fver=Z39.88-2004&res%5Fdat=xri:pqdiss &rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&rft_dat=xri:pqdiss:MR11872

Designs for a collection of re-usable software modules are developed. The modules are implemented in C and expressed in a tool-kit for the Unix operating system. Each tool is an expert in some aspect of the manipulation by computer of group presentations. The granularity of the tool-kit has been chosen so that common usages of the Todd-Coxeter and Reidemeister-Schreier methods can be expressed in various ways using any tool composition language (eg. shell scripts), and running as a collection of co-operating processes. Data file formats for the interchange of group-theoretic information between processes are described. The tools are tested on well-known examples, and are used to prove a long-standing conjecture. Use of the tools as the basis for a rule-based "expert system" is discussed.

As both computer languages and architectures continue to proliferate, there is a continuing need for new compilers. Researchers have attempted to ease the work of producing compilers by developing methods to automate compiler writing. While much work has been done (and considerable success achieved) in writing parsers which can handle a variety of source languages (using mainly table-driven analysis methods), less progress has been made in formalizing the code generation end of the compiler. Nevertheless, some of the more recent publications in code generation stress portability or retargetability of the resulting compiler. A number of code generator synthesisers have been developed, some of which produce code that can be compared in quality with that produced by a conventional code generator. However, because of the complexity of generalizing the mapping from source language to target machine, and the need for efficiency of various kinds, code generator synthesisers are large, complicated programs. Consequently, the person who develops a code generator using one of these tools invariably needs to be a code generation specialist himself. Many compilers follow a pattern of having a front end which generates intermediate code, and a back end which converts intermediate code to machine code. The intermediate code is effectively machine independent, or can be designed that way. With these points in mind, we have set out to write a system of programs which -- 1. will allow the generation of such a back end in a reasonably short time, for a general intermediate code, and for a general machine code, and -- 2. can be used by anyone who has a sound knowledge of the target machine's architecture and associated assembler language, but is not necessarily a specialist compiler writer. The system consists of a series of friendly, interactive programs by means of which the user sets up tables defining the architecture and assembly level instructions for the target machine, and the code templates onto which intermediate codes produced by a parser have been mapped. A general notation has been developed to represent machine instructions using the same format as the target assembler. Thus the code generator writer is able to write code sequences to perform the effects of the intermediate codes, using assembly mnemonics familiar to him. The resultant table-driven code generator simply replaces a sequence of intermediate codes by their respective code templates, relocating them in memory and filling in addresses known only at code-generation time. This thesis describes the use and implementation details of this generalized code generation system. As an example, the implementation of a code generator for a CLANG [23] parser on an 8080 processor is described. The discussion also includes guide-lines on how to implement a loader and associated run-time routines for use in executing the object code. The results of a number of bench-marks have shown, as expected, that code produced by a code generator developed in this manner is larger and slower than that from a special purpose optimizing code generator, but is still several times faster than interpreting the intermediate code. The major benefit to be gained from using this system lies in the shorter development time by a less skilled person. / KMBT_223 / Adobe Acrobat 9.53 Paper Capture Plug-in

CSP (Communicating Sequential Processes) is a notation proposed by Hoare, for expressing process communication and synchronization. Although this notation has been widely acclaimed, Hoare himself never implemented it as a computer language. He did however produce the necessary correctness proofs and subsequently the notation has been adopted (in various guises) by the designers of other concurrent languages such as Ada and occam. Only two attempts have been made at a direct and precise implementation of CSP. With closer scrutiny, even these implementations are found to deviate from the specifications expounded by Hoare, and in so doing restrict the original proposal. This thesis comprises two main sections. The first of these includes a brief look at the primitives of concurrent programming, followed by a comparative study of the existing adaptations of CSP and other message passing languages. The latter section is devoted to a description of the author's attempt at an original implementation of the notation. The result of this attempt is the creation of the CSP-i language and a suitable environment for executing CSP-i programs on an IBM PC. The CSP-i implementation is comparable with other concurrent systems presently available. In some aspects, the primitives featured in CSP-i provide the user with a more efficient and concise notation for expressing concurrent algorithms than several other message-based languages, notably occam. / KMBT_363 / Adobe Acrobat 9.53 Paper Capture Plug-in

The design and implementation of the interactive graphics language IGL is described. This language not only allows the definition and display of line drawings but also has full facilities for manipulating, naming, identifying and interacting with such drawings. The language has been implemented as an extension to Fortran IV using the XPL compiler generator system. The experience gained so far in the use of the language has already proven a number of advantages over present-day graphics systems. The language is readily learned by users with previous high-level language experience. As no extensive testing and documentation is necessary due to the readability of the program, the time required for the completion of a project is greatly reduced. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

Much work has been done in the many aspects of compiler generation. He examine the problems associated with the generation of a full compiler and present a method of modular construction which would solve many of the problems which occur in previous generation systems. As an example of this modular construction, a lexical scanner generator is designed to produce lexical scanners which are easily interfaceable with the other components of a compiler. / Science, Faculty of / Computer Science, Department of / Graduate

This dissertation undertakes to establish the feasibility of using MyHDL as a basis on which to develop an FPGA-based DSP tool-ow to target CASPER hardware. MyHDL is an open-source package which enables Python to be used as a hardware definition and verification language. As Python is a high-level language, hardware designers can use it to model and simulate designs, without needing detailed knowledge of the underlying hardware. MyHDL has the ability to convert designs to Verilog or VHDL allowing it to integrate into the more traditional design-ow. The CASPER tool- ow exhibits limitations such as design environment instability and high licensing fees. These shortcomings are addressed by MyHDL. To enable CASPER to take advantage of its powerful features, MyHDL is incorporated into a next generation tool-ow which enables high-level designs to be fully simulated and implemented on the CASPER hardware architectures.

This thesis presents the design, implementation, and analysis of WasmProf, an instrumenting profiler for WebAssembly programs. WebAssembly is a compiled language designed for use on the web that, at the time of this writing, is still being actively developed. At present, performance analysis for WebAssembly programs mostly consists of browsers’ built-in sampling profilers. These profilers work well in many cases but only give a statistical estimation of the distribution of function calls and are, therefore, not well-suited for more fine-grained analysis. The WasmProf instrumenting profiler fills this analysis gap. WasmProf is capable of tracking the number of calls made and the time spent in every function called within the profiled program. Analysis of WasmProf demonstrates performance equivalent to or slightly better than similar tools that perform instrumentation and dynamic analysis on WebAssembly programs.

No description available.

No description available.