Low-frequency noise has been measured on commercial power MOSFETs. These devices, fabricated with the VDMOS structure, exhibit a 1/f type noise spectrum. The interface state density obtained from noise measurements was compared with that obtained from the subthreshold-slope method. Reasonable agreement was found between the two measurements. The radiation effects on the noise power spectral density were also investigated. The results indicated that the noise can be attributed to the generation of interface traps near the Si-SiO₂ interface. The level of interface traps generated by radiation was bias dependent. The positive gate bias gave rise to the largest interface-trap density.

published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

published_or_final_version / Chemistry / Doctoral / Doctor of Philosophy

published_or_final_version / Chemistry / Doctoral / Doctor of Philosophy

The very low photon backgrounds to be achieved by future cryogenic astronomical telescopes present the ultimate challenge to the sensitivity of infrared detectors and associated readout electronics. Cooled silicon JFETs, operated around 70 K in transimpedance amplifiers, have shown excellent performance and stability. However, due to Johnson noise in the feedback resistor, the read noise in one second achieved by such amplifiers is about 500 electrons per second. A drastic improvement in sensitivity was demonstrated using a simple form of integrating JFET amplifiers. Therefore, the excellent performance obtained with cooled silicon JFETs has led to the investigation of their properties in the temperature range 33-77 K to explore their full potential and improve the performance of the integrating amplifier. The freezeout effect in silicon JFETs has been characterized both experimentally and theoretically using a simple analytical simulation program. The effect of variation in device parameters on the freezeout characteristic has been studied, and test results showed that an effective channel mobility must be used instead of a bulk mobility in order to simulate accurately the device current and transconductance freezeout at low temperatures. Many types of commercially available JFETs have been characterized below 77 K and measurements revealed that a balanced source follower or a common-source amplifier with active load can operate well down to 38 Kelvin with extremely low power dissipation. The open gate equivalent input noise voltage was found to be optimum below 77 K, due to a decrease in the gate leakage current, in agreement with theoretical prediction. Based on the superior performance of the balanced source follower with active load, a single channel hybrid integrating JFET amplifier with a JFET reset and a compensation capacitor was developed for operation in the temperature range 40-77 K. Read noise as low as 10 electrons in 128 seconds integration was achieved when the integrator was operated at an optimum temperature of about 55 K. Using a similar design, a 16-channel monolithic integrating amplifier array was designed and built. Preliminary test results at 77 K showed noise performance comparable to the single channel hybrid integrator.

When electronic components are to be used in systems destined for operation in the extraterrestrial environment, one must be concerned about the effects of the naturally occurring radiation in outer space. For example, power metal-oxide-semiconductor-field-effect transistors (MOSFETs) and power bipolar junction transistors (BJTs) are susceptible to a phenomenon called single-event burnout (SEB) which may result from bombardment by heavy ions originating from the nuclear reactions within the sun and other stars. SEB is a catastrophic failure mechanism initiated by the passage of a heavy ion through sensitive regions of the power MOSFET or power BJT. The main thrust of this dissertation is an analytical model describing the device-related aspects of the SEB mechanism. Physical device parameters such as doping concentrations, dimensions of various regions, and operating bias are related to SEB by the model. It is shown that the model predicts a decrease in the SEB susceptibility with a decrease in the internal base resistance (in the power BJT or parasitic BJT in the power MOSFET structure), a decrease in the operating bias, or an increase in the ambient device temperature. These findings are then qualitatively verified with experimental data.

Experiments were conducted on current-mirror MOSFETs to examine their suitability for use in radiation environments. These devices, which allow low loss load current sensing (defined by a current-ratio n'), are an important element of many power integrated circuits (PICs). Total-dose testing demonstrated that the current ratio was virtually unaffected for many operating conditions. In all cases, changes were largest when sense resistance was largest and minimal when sense voltage was approximately equal to the load source's voltage. In addition, testing verified the feasibility of using sense-cell MOSFETs for applications which require radiation exposure. A constant-current op-amp circuit showed minimal current shifts, using proper circuit design, following total-dose exposure. Dose-rate testing showed the feasibility of using sense voltage to trigger g&d2; protection through drain-source voltage clamping, providing a relatively inexpensive alternative to voltage derating.

Fast neutron irradiation tests were performed to determine the correlation of change of drain-source resistance and neutron fluence for power MOSFETs. The Objectives of the tests were: (1) to detect and measure the degradation of critical MOSFET device parameters as a function of neutron fluence (2) to compare the experimental results and the theoretical model. In general, the drain-source resistance increased from 1 Ohm to 100 Ohm after exposure to fast neutron fluence of 3 x 1014 neut/cm2, and decreased by a factor of five after high temperature annealing.

Many high performance amplifiers use power MOSFETs in their output stages, especially in operational amplifier applications whenever high current or power is needed. MOSFETs have advantages over bipolar transistors in amplifier output stage because MOSFETs are majority carrier devices. The result is wide frequency response, fast switching and better linearity than power bipolar transistors. But unlike bipolar circuits, which are relatively tolerant of ionizing radiation, MOSFETs may suffer severe parametric degradation at low total-dose levels. The effects of ionizing radiation on MOSFETs are discussed, and the performance of an amplifier circuit that uses a complementary MOSFET source follower in its output stage is simulated to examine the effect of MOSFET radiation damage on amplifier performance. An increase in power dissipation was the most significant degradation caused by ionizing radiation.

No description available.