This master's thesis is focused on the design of a highspeed aquizition system which is based on FPGA and a highspeed AD converter with modern JESD204B interface. Considering the requirements, such as high samplig rate, the current range of available devices is limited. Therefore the market overview of the modern IC and modules was made. The resulting design is based on available modules, so the rached sampling rate is up to 5 GSa/s with 12bits resolution. Data from measurement are send to PC via Ethernet which uses lwIp stack and TEMAC core on Microblaze proccessor.

The work deals with design of novel pipelined AD converter using switched-capacitors approach.

The work deals with the design of novel high order sigma-delta AD converter using switched-capacitors approach. Model of the ideal and real architecture of the third order sigma-delta modulator was designed in MATLAB SIMULINK. The comparison of the ideal and real model of sigma delta architecture is described in this thesis. On the basis of simulation results in MATLAB SIMULINK the stages of modulator on transistors level in CMOS technology were designed. Fully differential operational amplifier, switched capacitor integrator, summing amplifier, comparator, one bit digital to analog converter and nonoverlapping clock generator were designed. The circuit of third order sigma-delta modulator was simulated in CADENCE. Layout of operational amplifier and switched capacitor integrator was made. Through the use of MATLAB was designed decimation filter as well.

This diploma thesis deals with the design of a sigma delta AD converter for a sensor application of junction temperature measurement in the automotive environment. A modified continuous time current mode modulator structure was designed. Its advantage lies in shifting and extending an input voltage range to work with signals from 0 V to 1,2 with a high impedance input and a relatively low hardware complexity. The functionality was verified by a behavioral model in the Simulink environment and then by transistor level simulation in CADENCE environment using ONC18/I4T technology.

The aim of this thesis is the acquisition of data from the AD converter and it’s transfer via the JESD204B interface to FPGA with the following transformation and transfer to PC through 100G Ethernet or PCI Express interface. The first part of the thesis is focused on the introduction to used technologies and hardware and analysis of the solution of this project. Second part of the thesis describes solution and it’s functionality. I created HDL design which allows to transfer data from AD converter using both of the interfaces mentioned above. I also created software application for OS Linux which allows to receive and store incoming data in PC. In the end, the results of the measurement using the converter board are presented and discussed.

The increasing complexity of digital circuits forces the use of new technologies. New technologies have the advantage of reducing the circuit size and power consumption coupled with operation speed increasement. Most of signal processing operations migrated to the digital domain, thus, basic blocks like AD converters are needed in mixed-signal systems. Analog-todigital converters based on Sigma-Delta (ΣΔ) modulators stand out among the existing architectures because they cover a wide range of applications. The most common implementation of ΣΔ modulators in CMOS technology is based in switched-capacitor technique (SC), mainly due to its high performance and excellent linearity. However, the continuous reduction in the transistor physical dimensions requires a proportional reduction in the supply voltage levels, making difficult the design of analog circuits with conventional topologies. To overcome this problem, design techniques to analog circuits compatible with these new technologies were developed. This is the case of the technique known as switched-current (SI), which uses samples in the current domain to represent the signal information. This work presents the design of a switched-current Sigma-Delta modulator (SI-ΣΔM) using an architecture oriented to low-distortion applications. The architecture s main characteristic is the reduced sensitivity to integrator nonlinearities, leading to a significant increase in the signal-to-noise ratio (SNR) and dynamic range (DR) values, moreover, it permits the design of high-order modulators intrinsically stable. To demonstrate and verify the performance of the used strategy, based on a combination of circuit techniques and topology, a cascade 2-2 SI-ΣΔM was designed in a CMOS XFAB XC06 technology. Postlayout simulations show that the SNR reaches a maximum value of 80 dB and a dynamic range of approximately 87 dB, implying an effective resolution of 14.15 bits considering 20 kHz bandwidth. The prototype was sent to manufacturing and will be subject to laboratory tests when it returns. / A crescente complexidade dos circuitos digitais força o uso de novas tecnologias de fabricação. A mudança para tecnologias mais avançadas tem como vantagem a redução do tamanho do circuito e a diminuição do consumo de energia aliados ao aumento da velocidade de operação. Grande parte das operações envolvendo processamento de sinais migraram para o domínio digital, portanto, blocos básicos como conversores AD são necessários em sistemas de sinal misto. Conversores AD com base em moduladores do tipo Sigma-Delta (ΣΔ) destacam-se entre as arquiteturas existentes por cobrir uma ampla gama de aplicações. A implementação mais usual de moduladores ΣΔ em tecnologia CMOS baseia-se na técnica de capacitor-chaveado (SC), devido, principalmente, à sua elevada performance e excelente linearidade. Entretanto, a contínua redução das dimensões físicas dos transistores tem exigido uma redução proporcional dos níveis de tensão de alimentação, dificultando o projeto de circuitos analógicos com topologias convencionais. Para contornar este problema, técnicas de projeto de circuitos analógicos compatíveis com essas novas tecnologias foram desenvolvidas. Este é o caso da técnica conhecida como corrente chaveada (SI), que utiliza amostras sob a forma de corrente para a representação de sinais. Neste trabalho é apresentado o projeto de um modulador ΣΔ em modo corrente (SI-ΣΔM) empregando uma arquitetura orientada à aplicações de baixa distorção. Esta arquitetura tem como principal característica a reduzida sensibilidade às não-linearidades do integrador, conduzindo a uma significante melhora no valor da relação sinal-ruído (SNR) e faixa de excursão dinâmica (DR), além de permitir a concepção de moduladores ΣΔ de elevada ordem intrinsecamente estáveis. Para demonstrar e comprovar a performance da estratégia empregada, baseada na combinação de técnicas de circuito e de topologia, projetou-se um modulador SI-ΣΔ cascata 2-2 na tecnologia XFAB CMOS XC06. Simulações elétricas pós-layout revelam que o SNR atinge um valor máximo de 80 dB e uma faixa dinâmica de aproximadamente 87 dB, inferindo uma resolução efetiva de 14,15 bits considerando uma banda de interesse de 20 kHz. Por fim, o protótipo desenvolvido foi enviado para fabricação e será alvo de testes em laboratório quando retornar.

Master‘s thesis deals with analysis solutions and construction of the devices for data collection. At the beginning, they describe the basic types of devices for data collection. In other parts of the work is compared few commercial devices for data collection, under which the requirements will be selected on the proposed device for data collection. In other chapters of the work devoted to the design of schemes and selecting components for their manufacture. The last chapters are devoted to describing the design of device for data collection.

The aim of this thesis is to study the possibilities of spectrum calculations, as well as data transfer via USB 3.0 and data saving to a DDR3 memory via FPGA. The focus is also on design and realization of a spectral analyzer with a record of samples to DDR memory expnaded by a narrowband converter using gate arrays. The work is divided into two sections, the first one dealing with the theoretical background. The second part denotes the realization of the design. The result of this work is a signal analyzer in a FPGA controlled from a computer application via the USB 3.0 interface.

Subject of this effort is development and realization of one-channel data acquisition unit of mechanical quantities and it’s PC software application. Usage of this data acquisition unit is aimed on applications, where resistive strain gages wired as Wheatstone bridge with AC excitation are used. Output voltage of Wheatstone bridge is amplięed, demodulated with excitation voltage, filtered and level shifted for analog to digital conversion via AD converter. Converted digital data are sent via serial bus into microprocessor which sends them into PC for further meaningful representation in software application. Besides sensing bridge output voltage, data acquisition unit also generates AC excitation of Wheatstone bridge. This excitation voltage is generated via DA converter which communicates with microprocessor and converts incoming digital data into analog sine waveform. There is precise voltage reference circuitry for both of these converters. PC application’s task is to visualize measured data in meaningful form and to give tools for further work with measured data. It’s programmed in Python language and it has one independent thread which does reading and computing of incoming data and there is also class which builds graphical user interface and plots measured data into live graph.

This work descibes general principles of measuring the alternating current and voltage using conventional and unconventional sensors.This work shows specific parmeters conected with principles of the measurement, advantages and disadvantages of individual measuring procedures, types of output signals, precisions, limitations, ways of power and so on. Part of the work is to find optimal measurement procedure, which can be aplicated to practical measuring of alternating currents and voltage. Main part of the work concerns the realisation of optimal method of measuring alternating current.