- About
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The Global ETD Search service is a free service for researchers
to find electronic theses and dissertations. This service is
provided by the
Networked Digital Library of Theses and Dissertations.
Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
Search results
Showing 21 to 30 of 1510 (0.012 seconds)| 21 |
A solution for the general polynomial by an analog techniqueSchweppe, Fred C. January 1956 (has links)
No description available.
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| 22 |
The design of a calibration-free multiplying digital-to-analog converterGuenther, Edgar Theodore, 1941- January 1972 (has links)
No description available.
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| 23 |
A human performance tracking systemMorgan, Christopher Heddens 12 1900 (has links)
No description available.
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| 24 |
Charge-coupled devices for analog-to-digital conversionMichelson, Robert Carroll 12 1900 (has links)
No description available.
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| 25 |
Shaping microwave antenna radiation patterns by an aperture-field methodMoseley, Roland Eugene 08 1900 (has links)
No description available.
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| 26 |
Analog four-quadrant multiplier using NMOS integrated circuit technologyPeña Finol, Jesús Salvador 08 1900 (has links)
No description available.
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| 27 |
The determination of the autocorrelation function of certain random variables on an electronic analogue computerKent, Kenneth Earl 12 1900 (has links)
No description available.
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| 28 |
An incremental analog-to-digital converterWilliamson, Frank Robert 08 1900 (has links)
No description available.
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Design and development of high CMRR wide bandwidth instrumentation amplifiersSu, Wenjun January 1997 (has links)
No description available.
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| 30 |
Signal Processing Techniques for High-speed Chip-to-chip LinksBichan, Mike 20 August 2012 (has links)
This thesis tackles the problem of high-speed data communication over wireline channels. Particular attention is paid to backplane channels which have impedance discontinuities and high-frequency loss. These channels require extra equalization effort in order to produce an open eye diagram at the receiver. Three signal processing techniques were investigated in the pursuit of higher data rates over backplane channels: transmit-side FIR filter equalization with variable tap spacing, bidirectional communication using frequency-division multiplexing, and an ADC-based receiver to provide a capability for non-linear equalization. The ADC presented here is a 5-bit flash ADC intended to be time-interleaved to attain a sufficient data rate. This ADC uses redundant comparators to obtain sufficient resolution without an explicit threshold tuning circuit. A resonant clocking line is used to reduce power and increase the maximum clock frequency.
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