Global ETD Search

31	Signal Processing Techniques for High-speed Chip-to-chip Links Bichan, Mike 20 August 2012 (has links) This thesis tackles the problem of high-speed data communication over wireline channels. Particular attention is paid to backplane channels which have impedance discontinuities and high-frequency loss. These channels require extra equalization effort in order to produce an open eye diagram at the receiver. Three signal processing techniques were investigated in the pursuit of higher data rates over backplane channels: transmit-side FIR filter equalization with variable tap spacing, bidirectional communication using frequency-division multiplexing, and an ADC-based receiver to provide a capability for non-linear equalization. The ADC presented here is a 5-bit flash ADC intended to be time-interleaved to attain a sufficient data rate. This ADC uses redundant comparators to obtain sufficient resolution without an explicit threshold tuning circuit. A resonant clocking line is used to reduce power and increase the maximum clock frequency. analog electronics 0544
32	Modeling analog to digital converters at radio frequency / Björsell, Niclas, January 2007 (has links) Diss. (sammanfattning) Stockholm : Kungliga Tekniska högskolan, 2007. / Härtill 7 uppsatser. Analog-digital-omvandlare.
33	Aspects of designing a high speed analog to digital converter / Hsu, M. S. January 1992 (has links) (PDF) Thesis (M. Eng. Sc.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 1994? / Includes bibliographical references (leaves 212-223). Analog-to-digital converters
34	The design of a 10bit 15MHz analog to digital convertor / TeWinkle, Scott L. January 1993 (has links) Thesis (M.S.)--Rochester Institute of Technology, 1993. / Typescript. Includes bibliographical references (leaves 48-49). Analog-to-digital convertors
35	Theory and applications of delta-sigma analogue-to-digital converters without negative feedback Soell, Sven. January 2008 (has links) Thesis (Ph.D.) - University of Glasgow, 2008. / Ph.D. thesis submitted to the Department of Electronics and Electrical Engineering, Faculty of Engineering, University of Glasgow, 2008. Includes bibliographical references. Print version also available. Analog-to-digital converters
36	A background calibration technique and self testing method for the pipeline analog to digital converter Yoo, Jae Ki, January 1900 (has links) (PDF) Thesis (Ph. D.)--University of Texas at Austin, 2004. / Vita. Includes bibliographical references. Analog-to-digital converters
37	Digital calibration algorithms for nyquist-rate analog to digital converters Savla, Anup, January 2004 (has links) Thesis (Ph. D.)--Ohio State University, 2004. / Title from first page of PDF file. Document formatted into pages; contains xxi, 246 p.; also includes graphics. Includes bibliographical references (p. 211-214). Analog-to-digital converters
38	Real-time implementation of signal reconstruction algorithm for time-based a/d converters Vuppamandla, Kalyana. January 2004 (has links) Thesis (M.S.)--University of Florida, 2004. / Title from title page of source document. Document formatted into pages; contains 82 pages. Includes vita. Includes bibliographical references. Analog-to-digital converters
39	Analog computer simulation of a transistor switching circuit Asmussen, Jes. January 1964 (has links) Thesis (M.S.)--University of Wisconsin--Madison, 1964. / eContent provider-neutral record in process. Description based on print version record. Bibliography: l. 43. Transistors. Analog computers.
40	An 8-b, 1.8 V, 20 MS/s analog to digital converter / Beck, Douglas R. January 2002 (has links) Thesis (Ph. D.)--University of Washington, 2002. / Vita. Includes bibliographical references (leaves 82-84). Analog-to-digital converters.

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