The goal of this research is to develop a post-implantation annealing process in silicon carbide (SiC). Due to the low diffusivities of dopants in SiC, even at temperatures in excess of 2000°C, diffusion is not a suitable process to achieve selective, planar doping. Ion implantation is therefore the most suitable means for achieving selective doping in SiC crystals. The strong covalent bonding in SiC requires that selective doping be performed via high-energy ion implantation. As a consequence of the high ion energy and flux, there is considerable lattice damage to the crystal surface. To repair the damage caused by the implantation, as well as to electrically activate the dopants, it is important to perform post-implantation thermal annealing at temperatures greater than 1600°C. However annealing at such high temperatures decomposes the SiC crystal surface due to the selective out-diffusion of Si causing surface morphology degradation. In this research two processes, both using a silane-based SiC CVD reactor, have been realized to minimize the evaporation of Si. This is accomplished by providing Si overpressure above the wafer surface during annealing thus suppressing the evaporation of Si from the lattice. Post-implantation anneals were performed in both hot-wall and cold-wall silane-based chemical vapor deposition (CVD) reactors. For each process temperature developed, silane was added to a stream of Ar in such a concentration such that the suppression of step-bunching, a well known phenomenon caused by the evaporation of Si at the surface, was achieved. The surfaces were studied after annealing via plan-view secondary electron microscopy (SEM) and atomic force microscopy (AFM). The resulting surface morphology was found to be both step-free and smooth. Results of the annealing process developed, the surface characterization performed and electrical data relating to the dopant activation and implanted region conductivity are presented.