In this thesis, real time image rendering for hand held devices is studied according to user&rsquo / s view point choice and using image frames with corresponding depth maps obtained from 2 different cameras, of which positions on coordinate system is known. User&rsquo / s view point choice is restricted to the area between right, and left cameras. Occlusion handling methods for image rendering systems is explored and discussed together with frame enhancement techniques. Median filtering is studied for multicolor image frames and post processing methods are discussed for image enhancement at the end of rendering algorithm. In this thesis, OMAP3530 microprocessor is used as the main processor which processes suggested rendering algorithm with occlusion handling and frame enhancement. proposed algorithms are implemented on DSP core and ARM cores of OMAP3530 separately and their performances are evaluated through experiments. Embedded Linux (Kernel-2.6.22) is run as the operating system for applications. Driver usage together with devices for Linux embedded operating system is explored and studied. 3 boards are used for the realization of proposed system. OMAP35x EVM board from Mistral Solutions Company is used for processor utilization, high resolution LCD utilization, system monitoring, user interface and communication purposes. Two daughter cards are designed for user view point determination. First daughter card handles communication process with EVM board and calculates view point according to input from second daughter card with single axis response GYRO sensor (ADIS16060). Spartan&reg / -3A DSP FPGA family is utilized in this system for view point determination. DSP slices that are hardly present inside gate arrays of this FPGA family are utilized and their performance is studied. Asynchronous memory interface, i2c bus interface, SPI interface are studied and implemented on FPGA.

In this thesis, real time detection of traffic signs using FPGA hardware is presented. Traffic signs have distinctive color and shape properties. Therefore, color and shape based algorithms are chosen to implemented on FPGA. FPGA supports sufficient logic to implement complete systems and sub-systems. Color information of images/frames is used to minimize the search domain of detection process. Using FPGA, real time conversion of YUV space to RGB space is performed. Furthermore, color thresholding algorithm is used to localize the sign in the image/video depending on the color. Edges are the most important image/frame attributes that provide valuable information about the shape of the objects. Sobel edge detection algorithm is implemented on FPGA. After color segmentation, FPGA implementation of Sobel algorithm is used to find the edges of candidate traffic signs in real time. Later, radial symmetry based shape detection algorithm is used to determine circular traffic signs. Each FPGA implemented algorithm is tested by using video sequences and static images. In addition, combined implementation of color based and shape based algorithms are tested. Joint application of color and shape based algorithms are used in order to reduce search domain and the processing time of detection process. Designing architecture on FPGA makes traffic sign detection system portable as a final product and relatively more efficient than the computer based detection systems. The resulting hardware is suitable where cost and compactness constraints are important.

Increasing usage of multi-core processors has led to their use in real time embedded systems (RTES). This entails high performance requirements which may not be easily met when software development follows traditional techniques long used for single processor systems. In this study, parallel programming design patterns especially developed and reported in the literature will be used to improve RTES implementations on multi-core systems. Specific performance parameters will be selected for assessment, and performance of traditionally developed software will be compared with that of software developed using parallel programming patterns.

Fast paced improvement of Ethernet technology has also received attention in the industry field like it did in other fields and ways of usage have started to be studied. As it is understood that the standard Ethernet protocols cannot be used due to the unsatisfied real time requirements, industrial and academic researchers have started to develop solutions to overcome this deficiency. In this thesis, the real hardware adaptations of Real Time Ethernet and RTXX protocol algorithms are implemented and their behaviors on the hardware are observed. Each parameter that affects the system&rsquo / s real time behavior is individually examined and the solution proposals are discussed.

The present graph cut methods cannot be used directly for real time stereo matching applications because of their recursive structure. Graph cut method is modified to change its recursive structure so that making it suitable for real time FPGA (Field Programmable Gate Array) implementation. The modified method is firstly tested by MATLAB on several data sets, and the results are compared with those of previous studies. Although the disparity results of the modified method are not better than other methods&rsquo / , computation time performance is better. Secondly, the FPGA simulation is performed using real data sets. Finally, the modified method is implemented in FPGA with two PAL cameras at 25 Hz. The computation time of the implementation is 40 ms which is suitable for real time applications.

Nowadays, Global Positioning System (GPS) which provide global coverage, continuous tracking capability and high accuracy has been preferred as the primary tracking system for onboard real-time precision orbit determination of Low Earth Orbiters (LEO). In this work, real-time orbit determination algorithms are established on the basis of extended Kalman, unscented Kalman, regularized particle, extended Kalman particle and extended H-infinity filters. Particularly, particle filters which have not been applied to the real time orbit determination until now are also performed in this study and H-infinity filter is presented using all kinds of real GPS observations. Additionally, performance of unscented Kalman filter using GRAPHIC (Group and Phase Ionospheric Correction) measurements is investigated. To evaluate performances of all algorithms, comparisons are carried out using different types of GPS observations concerning C/A (Coarse/Acquisition) code pseudorange, GRAPHIC and navigation solutions. A software package for real time orbit determination is developed using recursive filters mentioned above. The software is implemented and tested in MATLAB&copy / R2010 programming language environment on the basis of the object oriented programming schema.

Dynamic Distributed Dependable Real-time Industrial communication Protocol family (D3RIP), has been proposed in the literature considering the periodic or event-based traffic characteristics of the industrial communication networks. D3RIP framework consists of two protocol families: Interface Layer (IL) protocol family, which is responsible for providing the accurate time-division multiple access (TDMA) on top of a shared-medium broadcast channel, and Coordination Layer (CL), which is defined to fulfill the external requirements of IL. In this thesis, the hardware adaptations of the two protocols, Real-time Access Interface Layer (RAIL) and Time-slotted Interface Layer (TSIL), of the IL protocol family, are implemented. Their performance on both personal computers (PC) and development kits (DK) are observed.

Currently automation components of large-scale industrial systems are realized with distributed controller devices that use local sensor/actuator events and exchange shared events with communication networks. Fast paced improvement of Ethernet provoked its usage in industrial communication networks. The incompatibility of standard Ethernet protocol with the real-time requirements encouraged industry and academic researchers to provide a resolution for this problem. However, the existing solutions in the literature suggest a static bandwidth allocation for each controller device which usually leads to an inefficient bandwidth use.Dynamic Distributed Dependable Real-time Industrial Communication Protocol (D3RIP) family dynamically updates the necessary bandwidth allocation according to the messages generated by the control application. D3RIP is composed of two protocols / interface layer that provides time-slotted access to the shared medium based on an accurate clock synchronization of the distributed controller devices and coordination layer that decides the ownership of real-time slots. In this thesis, coordination layer protocol of D3RIP family and the IEEE 1588 time synchronization protocol is implemented and tested on the real hardware system that resembles a factory plant floor. In the end, we constructed a system that runs an instance of D3RIP family with 3ms time-slots that guarantees 6.6ms latency for the real-time packets of control application. The results proved that our implementation may be used in distributed controller realizations and encouraged us to further improve the timing constraints.

RNA-binding proteins (RBP) shuttle between cellular compartments either constitutively or in response to stress and regulate localization, translation and turn over of mRNAs. In our laboratory, cytosolic proteome map of Phanerochaete chrysosporium was established and upon Pb exposure, the changes in cytosolic protein expressions were determined. The identified RBPs were a newly induced polyadenylate-binding protein (RRM superfamily) as well as two up-regulated proteins, namely splicing factor RNPS1 and ATP-dependent RNA helicase, all being very important candidates of post-transcriptional control in response to stress. This finding inspired us to conduct Real Time PCR studies in order to have a better understanding of the changes in the expression of corresponding genes at mRNA level in response to Pb exposure, thus the present study aims at examining the effect of lead exposure on the transcript levels of the genes coding for ATP-dependent RNA helicase, splicing factor RNPS1 and polyadenylate binding protein. As shown via expression analysis based on Real Time PCR, the mRNA level of splicing factor RNPS1 showed 2.68, 2.62 and 4.86 fold increases in a dose-dependent manner when the cells were grown for 40 h in the presence of 25, 50 and 100 &micro / M Pb, repectively. ATP-dependent RNA helicase mRNA level showed no significant increase in response to 25 &micro / M Pb exposure while increased 2 and 1.84 fold in response to 50 and 100 &micro / M Pb, respectively. Polyadenylate binding protein mRNA levels revealed no significant increase when exposed to 25, 50 and 100 &micro / M Pb. As to the mRNA dynamics as a function of duration of lead exposure, the mRNA level of this protein showed 2.54-fold increase upon 1 h exposure to 100 &micro / M Pb. Splicing factor RNPS1 mRNA level showed a significant increase of 19.22 fold at 2nd h of 50 &micro / M Pb exposure. Expression level of ATP-dependent RNA helicase was not affected by the time of exposure to Pb.

Networked Control Systems (NCS) are distributed control systems where the sensor signals to the controllers and the control data to the actuators are enclosed in messages and sent over a communication network. On the one hand, the design of an NCS requires ensuring the stability of the control system and achieving system response that is as close as possible to that of an ideal system which demands network resources. On the other hand, these resources are limited and have to be allocated efficiently to accommodate for future system extensions as well as applications other than control purpose. Furthermore the NCS design parameters for the control system messages and the message transmission over the network are interdependent. In this thesis, we propose &ldquo / Integrated NCS Design (INtERCEDE: Integrated NEtwoRked Control systEm DEsign)&rdquo / a novel algorithmic approach for the design of NCS which ensures the stability of the control system, brings system response to that of an ideal system v as close as desired and conserves network bandwidth at the same time. The core of INtERCEDE is a bargaining game approach which iteratively calculates the message parameters and network service parameters. Our experimental results demonstrate the operation of INtERCEDE and how it computes the optimal design parameters for the example NCS.