In this Thesis, we present a fault recovery mechanism by considering both local and global repairs for real-time traffic conveyed over MPLS networks. To meet the end-to-end time constraints of real-time traffic flows, once a link failure occurs, the real-time packets are sent via the most nearby local repair path if one can be identified, while at the same time the probe packets are sent to the Egress router over every possible local repair paths. By monitoring all of the incoming probe packets, the Egress router can determine which path is the most suitable repair path using the minimum-delay-deviation criterion and then sends out all the remaining packets over the new path. To fulfill the delay requirements of real-time flows whenever link failures occur, the probe packets need to be periodically sent out to reflect the dynamic change of traffic loads on the pre-established LSPs. The simulation results, after running on the MSN, have demonstrated that our recovery scheme not only forwards the packets of real-time flows in time over the local repair paths, but also prevents them from possible out-of-order situations. Besides, the proposed scheme of dynamic rerouting assist us in achieving the end-to-end delay guarantee for real-time traffic on MPLS networks.

IEEE 802.11 has become the standard in wireless LAN. Originally, 802.11 is designed for the best-effort services only. To support the increasing demand of delay-sensitive applications, IEEE 802.11 Task Group E is developing a QoS-aware MAC protocol, EDCF, for differentiated services. However, when the network becomes congested, there exists unexpected packet delay due to collisions and retransmissions. This thesis proposes a dynamic contention control (DCC) scheme to reduce packet delay and increase the percentage of packets arriving in time. DCC estimates per-hop delay, denoted as Mrtt, and end-to-end delay, denoted as Sigma_t, based on either the received MAC-layer ACK or the control packets of a reactive routing protocol. Then, Mrtt and Sigma_t are used to dynamically adjust the associated contention window for each priority. Besides, when a frame is retransmitted, the backoff time is determined according to the remaining end-to-end delay instead of a uniformly distributed random number. For the propose of evaluation, we perform simulations on the well-known network simulator, NS-2. DCC is compared with the EDCF and one previously proposed scheme, AEDCF. The simulation results demonstrate the effectiveness and superiority of DCC.

The purpose of this research is to study the acceptance of road-users on the real-time integrated digital traffic information system, with the use of Technology Acceptance Model (TAM) and Media Richness Theory (MRT) as foundations. Further understanding on the properties and demands of populations in the use of real-time integrated digital traffic information system are done through the application of ANOVA (Analysis of Variance) and Regression Analysis. Moreover, with the integration of real time police road condition broadcasting and mobile communication technology, an ideal real-time integrated digital traffic information system is built¡Xthe Mobile Messenger, and a mobile communication technology is developed as main point of service infrastructure. Transforming static broadcasting service into mobile information service, road-users are provided with a high-speed, safe and quality driving environment.

FlexRay is a new automotive network communication protocol for control and interconnection among ECUs (electronic control units) in the cluster. In the FlexRay protocol, a communication cycle consists of static segment and dynamic segment. The static segment is a TDMA scheme designed for transmitting time-triggered messages. Due to its determinism and reliability, it is particularly applicable to X-by-wire applications. Each static slot is allocated to a specified task and the task can transmit message during the exclusive slot. However, if the task has no message to transmit during its assigned slot, the slot cannot be used by other tasks. The overall utilization is low if the bandwidth requirement of each task is not high. To improve the system utilization, we apply the real-time scheduling techniques to devising a deterministic, static cyclic scheduling. The objective is to reduce the demand on the number of static slots needed for scheduling time-triggered tasks. Specifically, we treat the set of static slots that are in the same position in every communication cycle as an individual real-time channel. We model each task as a real-time task, specified by (Ci,Ti). It requires that for every Ti communication cycles, the system must allocate at least Ci time slots to satisfy the real-time constraint of the task. We decompose each such task into a set of subtasks, allocate them to the real-time channels and then apply the rate-monotonic scheduling algorithm to schedule the subtasks within each channel. Finally, we perform computer simulation to evaluate the effectiveness of our proposal. From the simulation results, we conclude that our proposal is able to effectively reduce the demand for the static slots under a wide range of real-time requirements.

In this thesis, we address the problem of real-time path search in partially observable grid worlds, and propose two single agent and one multi-agent search algorithm. The first algorithm, Real-Time Edge Follow (RTEF), is capable of detecting the closed directions around the agent by analyzing the nearby obstacles, thus avoiding dead-ends in order to reach a static target more effectively. We compared RTEF with a well-known algorithm, Real-Time A* (RTA*) proposed by Korf, and observed significant improvement. The second algorithm, Real-Time Moving Target Evaluation Search (MTES), is also able to detect the closed directions similar to RTEF, but in addition, determines the estimated best direction that leads to a static or moving target from a shorter path. Employing this new algorithm, we obtain an impressive improvement over RTEF with respect to path length, but at the cost of extra computation. We compared our algorithms with Moving Target Search (MTS) developed by Ishida and the off-line path planning algorithm A*, and observed that MTES performs significanlty better than MTS, and offers solutions very close to optimal ones produced by A*. Finally, we present Multi-Agent Real-Time Pursuit (MAPS) for multiple predators to capture a moving prey cooperatively. MAPS introduces two new coordination strategies namely Blocking Escape Directions (BES) and Using Alternative Proposals (UAL), which help the predators waylay the possible escape directions of the prey in coordination. We compared our coordination strategies with the uncoordinated one, and observed an impressive reduction in the number of moves to catch the prey.

Crosscutting concerns are the issues in software that cannot be modularized within a software module. In this thesis work, a detailed evaluation of the use of Aspect Oriented Programming for the implementation of crosscutting concerns in embedded real-time systems is presented. The pilot Audio Switch project implementations are first evaluated in terms of software quality attributes. Then a detailed analysis of the two implementations, according to embedded real-time performance metrics has been carried out. Evaluation results show the benefits of Aspect Oriented Programming in embedded real-time systems.

Application of optimization techniques for determining the optimal operating policy for reservoirs is a major title in water resources planning and management. Genetic algorithms, ruled by evolution techniques, have become popular for solving optimization problems in diversified fields of science. The main aim of this research was to explore the efficiency and effectiveness of the applicability of genetic algorithm in optimization of multi-reservoirs. A computer code has been constructed for this purpose and verified by means of a reference problem with a known global optimum. Three reservoirs in the Colorado River Storage Project were optimized for maximization of energy production. Besides, a real-time approach utilizing a blend of online and a posteriori data was proposed. The results achieved were compared to the real operational data and genetic algorithms were found to be effective, competitive and can be utilized as an alternative technique to other traditional optimization techniques.

Software testing is an important phase the of software development cycle which reveals faults and ensures correctness of the developed software. Distributed real-time systems are mostly safety critical systems for which the correctness and quality of the software is much more significant. However, majority of the current testing techniques have been developed for sequential (non real-time) software and there is a limited amount of research on testing distributed real-time systems. In this thesis, a proposed approach in the academic literature testing distributed real-time systems using a distributed test architecture is implemented and compared to existing software testing practices in a software development company on a case study. Evaluation of the results show the benefits of using the considered distributed test approach on distributed real-time systems in terms of software correctness.

Quality of Service (QoS) support for real-time traffic is a critical issue in high speed networks. The previously proposed Delay-Limiter Switch working with the Framed-Deadline Scheduler (FDS) is a combined input-output queuing (CIOQ) packet switch that can provide end-to-end bandwidth and delay guarantees for connection-oriented traffic. The Delay-Limiter Switch works with fixed-size packets. It has a scalable architecture and can provide QoS support for connection-oriented real-time traffic in a low-complexity fashion. The Delay-Limiter Switch serves connectionless traffic by using the remaining resources from the connection-oriented traffic. In this case, efficient management of the residual resources plays an important role on the performance of the connectionless traffic. This thesis work integrates new methods to the Delay-Limiter Switch that can improve the performance of the connectionless traffic while still serving the connection-oriented traffic with the promised QoS guarantees. A new method that makes it possible for the Delay-Limiter Switch to support variable-sized packets is also proposed.

In this thesis, real time image rendering for hand held devices is studied according to user&rsquo / s view point choice and using image frames with corresponding depth maps obtained from 2 different cameras, of which positions on coordinate system is known. User&rsquo / s view point choice is restricted to the area between right, and left cameras. Occlusion handling methods for image rendering systems is explored and discussed together with frame enhancement techniques. Median filtering is studied for multicolor image frames and post processing methods are discussed for image enhancement at the end of rendering algorithm. In this thesis, OMAP3530 microprocessor is used as the main processor which processes suggested rendering algorithm with occlusion handling and frame enhancement. proposed algorithms are implemented on DSP core and ARM cores of OMAP3530 separately and their performances are evaluated through experiments. Embedded Linux (Kernel-2.6.22) is run as the operating system for applications. Driver usage together with devices for Linux embedded operating system is explored and studied. 3 boards are used for the realization of proposed system. OMAP35x EVM board from Mistral Solutions Company is used for processor utilization, high resolution LCD utilization, system monitoring, user interface and communication purposes. Two daughter cards are designed for user view point determination. First daughter card handles communication process with EVM board and calculates view point according to input from second daughter card with single axis response GYRO sensor (ADIS16060). Spartan&reg / -3A DSP FPGA family is utilized in this system for view point determination. DSP slices that are hardly present inside gate arrays of this FPGA family are utilized and their performance is studied. Asynchronous memory interface, i2c bus interface, SPI interface are studied and implemented on FPGA.