In recent years, the research focus has moved from core microarchitecture to uncore microarchitecture. Cycle-accurate models for many-core processors featuring hundreds or even thousands of cores are out of reach for simulating realistic workloads. A large portion of the simulation time is spend in the cores, and it is this portion that grows linear with every processor generation. Approximate simulation methodologies, which trade off accuracy for simulation speed, are necessary for conducting certain research. Multicore processors also demand for more advanced and rigorous simulation methodologies. Many popular methodologies designed by computer architects for simulation of single core architectures must be adapted or even rethought for simulation of multicore architectures.In this thesis, we have shown that behavioral core modeling is a competitive option for multicore studies where the research focus is in the uncore microarchitecture and considering independent tasks. We demonstrated that behavioral core models can bring speedups between one and two orders of magnitude with average CPI errors of less than 5%. We have also demonstrated that behavioral core models can help in the problem of selecting multiprogram workloads for the evaluation of multicore throughput.

Ces dernières années, l'effort de recherche est passé de la microarchitecture du cœur à la microarchitecture de la hiérarchie mémoire. Les modèles précis au cycle près pour processeurs multi-cœurs avec des centaines de cœurs ne sont pas pratiques pour simuler des charges multitâches réelles du fait de la lenteur de la simulation. Un grand pourcentage du temps de simulation est consacré à la simulation des différents cœurs, et ce pourcentage augmente linéairement avec chaque génération de processeur. Les modèles approximatifs sacrifient de la précision pour une vitesse de simulation accrue, et sont la seule option pour certains types de recherche. Les processeurs multi-cœurs exigent également des méthodes de simulation plus rigoureuses. Il existe plusieurs méthodes couramment utilisées pour simuler les architectures simple cœur. De telles méthodes doivent être adaptées ou même repensées pour la simulation des architectures multi-cœurs. Dans cette thèse, nous avons montré que les modèles comportementaux sont intéressants pour étudier la hiérarchie mémoire des processeurs multi-cœurs. Nous avons démontré que l'utilisation de modèles comportementaux permet d'accélérer les simulations d'un facteur entre un et deux ordres de grandeur avec des erreurs moyennes de moins de 5%. Nous avons démontré également que des modèles comportementaux peuvent aider dans le problème de la sélection des charges de travail multiprogrammées pour évaluer la performance des microarchitectures multi-cœurs. / In recent years, the research focus has moved from core microarchitecture to uncore microarchitecture. Cycle-accurate models for many-core processors featuring hundreds or even thousands of cores are out of reach for simulating realistic workloads. A large portion of the simulation time is spend in the cores, and it is this portion that grows linear with every processor generation. Approximate simulation methodologies, which trade off accuracy for simulation speed, are necessary for conducting certain research. Multicore processors also demand for more advanced and rigorous simulation methodologies. Many popular methodologies designed by computer architects for simulation of single core architectures must be adapted or even rethought for simulation of multicore architectures.In this thesis, we have shown that behavioral core modeling is a competitive option for multicore studies where the research focus is in the uncore microarchitecture and considering independent tasks. We demonstrated that behavioral core models can bring speedups between one and two orders of magnitude with average CPI errors of less than 5%. We have also demonstrated that behavioral core models can help in the problem of selecting multiprogram workloads for the evaluation of multicore throughput.

In this thesis we address the problem of providing end-to-end quality of service (QoS) to real-time and data connections in a third generation (3G) cellular network based on the Universal Mobile Telecommunication System (UMTS) standard. Data applications usually use TCP (Transmission Control Protocol) and the QoS is a minimum guaranteed mean throughput. For this one first needs to compute the throughput of a TCP connection sending its traffic through the UMTS network (possibly also through the wired part of the Internet). Thus we obtain closed form expressions for a TCP throughput in a UMTS environment. For downloading data at a mobile terminal, the packets of each TCP connection are stored in separate queues at the base station (node B). These are fragmented into Protocol Data Units (PDU). The link layer uses ARQ (Automatic Repeat Request). Thus there can be significant random transmission/queueing delays of TCP packets at the node B. On the other hand the link may not be fully utilized due to the delays of the TCP packets in the rest of the network. In such a scenario the existing models of TCP may not be sufficient. Thus we provide new approximate models for TCP and also obtain new closed form expressions of mean window size. Using these we obtain the throughput of a TCP connection for the scenario where the queueing delays are non-negligible compared to the overall Round Trip Time (RTT) and also the link utilization is less than one. Our approximate models can be useful not only in the UMTS context but also else where. In the second half of the thesis, we use these approximate models of TCP to provide minimum mean throughput to data connections in UMTS. We also consider real-time applications such as voice and video. These can tolerate a little packet loss (~1%) but require an upper Bound on the delay and delay jitter (≤ 150 ms). Thus if the network provides a constant bandwidth and the received SINR is above a specified threshold ( with a certain probability), QoS for the real-time traffic will be satisfied. The 3G cellular systems are interference limited. Thus wise allocation of power is critical in these systems. Hence we consider the problem of providing end-to-end QoS to different users along with the minimization of the downlink power allocation.