Security issues play an important role in almost all modern communication and computer networks. As Internet applications continue to grow dramatically, security requirements have to be strengthened. Hyperelliptic curve cryptosystems (HECC) allow for shorter operands at the same level of security than other public-key cryptosystems, such as RSA or Diffie-Hellman. These shorter operands appear promising for many applications. Hyperelliptic curves are a generalization of elliptic curves and they can also be used for building discrete logarithm public-key schemes. A major part of this work is the development of computer architectures for the different algorithms needed for HECC. The architectures are developed for a reconfigurable platform based on Field Programmable Gate Arrays (FPGAs). FPGAs combine the flexibility of software solutions with the security of traditional hardware implementations. In particular, it is possible to easily change all algorithm parameters such as curve coefficients and underlying finite field. In this work we first summarized the theoretical background of hyperelliptic curve cryptosystems. In order to realize the operation addition and doubling on the Jacobian, we developed architectures for the composition and reduction step. These in turn are based on architectures for arithmetic in the underlying field and for arithmetic in the polynomial ring. The architectures are described in VHDL (VHSIC Hardware Description Language) and the code was functionally verified. Some of the arithmetic modules were also synthesized. We provide estimates for the clock cycle count for a group operation in the Jacobian. The system targeted was HECC of genus four over GF(2^41).

Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip platforms with multiple heterogeneous cores are commonly available in mobile phones and other embedded devices. In this work we investigate the design space for ECC on TI's OMAP 3530 platform, with a focus of utilizing the on-chip DSP core to improve the performance and efficiency of ECC point multiplication on the target platform. We examine multiple aspects of ECC and heterogeneous design such as algorithm-level choices for elliptic curve operations and the effect of interprocessor communication overhead on the design partitioning. We observe how the limitations of the platform constrict the design space of ECC. However, by closely studying the platform and efficiently partitioning the design between the general purpose ARM core and the DSP, we demonstrate a significant speed-up of the resulting ECC implementation. Our system focused approach allows us to accurately measure the performance and power profiles of the resulting implementation. We conclude that heterogeneous multiprocessor design can significantly improve the performance and power consumption of ECC operations, but that the integration cost and the overhead of interprocessor communication cannot be ignored in any actual system. / Master of Science

Elliptic curve cryptography (ECC) has been introduced as a public-key cryptosystem, which offers smaller key sizes than the other known public-key systems at equivalent security level. The key size advantage of ECC provides faster computations, less memory consumption, less processing power and efficient bandwidth usage. These properties make ECC attractive especially for the next generation public-key cryptosystems. The implementation of ECC involves so many arithmetic operations / one of them is the elliptic curve point multiplication operation, which has a great influence on the performance of ECC protocols. In this thesis work, we have studied on elliptic curve point multiplication methods which are proposed by many researchers. The software implementations of these methods are developed in C programming language on Pentium 4 at 3 GHz. We have used NIST-recommended elliptic curves over prime and binary fields, by using efficient finite field arithmetic. We have then applied our elliptic curve point multiplication implementations to Elliptic Curve Digital Signature Algorithm (ECDSA), and compared different methods. The timing results are presented and comparisons with recent studies have been done.

Modern public-key cryptography relies extensively on modular multiplication with long operands. We investigate the opportunities to optimize this operation in a heterogeneous multiprocessing platform such as TI OMAP3530. By migrating the long operand modular multiplication from a general-purpose ARM Cortex A8 to a specialized C64x+ VLIW DSP, we are able to exploit the XOR-Multiply instruction and the inherent parallelism of the DSP. The proposed multiplication utilizes Multi-Precision Binary Polynomial Multiplication with Unbalanced Exponent Modular Reduction. The resulting DSP implementation performs a GF(2^233) multiplication in less than 1.31us, which is over a seven times speed up when compared with the ARM implementation on the same chip. We present several strategies for different field sizes and field polynomials, and show that a 360MHz DSP easily outperforms the 500MHz ARM. / Master of Science