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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

BIT RATE AGILITY FOR EFFICIENT TELEMETRY

Moen, Selmer, Jones, Charles 10 1900 (has links)
International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The Bit Rate Agile Onboard Telemetry Formatting (BRAOTF) system was developed by Killdeer Mountain Manufacturing to address increasing demands on the efficiency of telemetry systems. The BRAOTF thins and reorders data streams, adjusting the bit rate of a pulse code modulation (PCM) stream using a bit-locked loop to match the desired information rate exactly. The BRAOTF accomplishes the adjustment in hardware, synthesizing a clock whose operating frequency is derived from the actual timing of the input format. Its firmware manages initialization and error management. Testing has confirmed that the BRAOTF implementation meets its design goals.
2

PROGRAMMABLE HIGH BIT RATE FRAME SYNCHRONISER

CHAKRABORTY, S.K., RAJANGAM, R.K. 11 1900 (has links)
International Telemetering Conference Proceedings / October 30-November 02, 1989 / Town & Country Hotel & Convention Center, San Diego, California / The first Indian Remote Sensing Satellite was launched on 17th March 1988 from a Soviet Cosmodrome into a 904 Km Polar Sunsynchronous orbit. The data transmission from the satellite is at 5.2 Mega Bits/sec in S-Band and 10.4 Mega Bits/sec in X-Band. The payload data is formatted into custom made 8328 words format. A programmable unique versatile frame sync and Decommutation unit has been developed to test the data from the data handling system during its various phases of development. The system works upto 50 Mega Bits/sec and can handle frame sync code length upto 128 bits and a frame length of 2 Exp 20 bits. Provision has been made for programming the allowable bit errors as well as bit slippages, using a front panel setting. This paper describes the design and implementation of such a high bit rate frame synchroniser developed specially for IRS Spacecraft application. It will also highlight the performance of the system.
3

Vývoj standardu rovného a spravedlivého zacházení v dohodách o ochraně a podpoře zahraničních investic / Development of the standard of fair and equitable treatment in treaties on protection and support of foreign investment

Forman, Jakub January 2015 (has links)
of the thesis: The thesis deals with the fair and equitable standard of treatment under international investment law. The author notably analyzes scholarly literature and case law of arbitral tribunals concerning the theoretical concept (approach) considering the connection to the minimum standard of treatment under customary international law, but also other approaches depending on the standard's formulation and the possibility of the standard's concept unification. The author firstly puts the fair and equitable standard of treatment into the context of the international investment law and public international law and defines the most important basic terms of the international investment law. Subsequently, the author presents the history of the standard, its basic characteristics and attempts at defining the standard. The author also shortly deals with the content, i. e. individual elements or aspects of the standard derived from the case law of arbitral tribunals. The author then deals in more detail with the standard's concept according to which the standard is equal to the minimum international standard of treatment under customary international law. In this part, the author also focuses on the distinction between minimum standard of treatment in traditional view and dynamic view, next the...
4

Two-photon readout methods for an ion trap quantum information processor

McDonnell, Matthew January 2003 (has links)
No description available.
5

PC Plug-In Telemetry Decommutator Using FPGAS

Vishwanathan, A. N., Biju, S., Narayana, T. V., Anguswamy, P., Singh, U. S. 11 1900 (has links)
International Telemetering Conference Proceedings / October 30-November 02, 1995 / Riviera Hotel, Las Vegas, Nevada / This paper describes the design of a PC plug-in card that incorporates all functions of the base band segment of a PCM decommutator which includes the bit synchroniser (BS), frame synchroniser (FS) and subframe synchroniser (SFS). FPGAs are used for the realization of the digital sections of the circuit. The card is capable of handling all standard IRIG codes. The bit synchroniser can handle data rates upto 1Mbps (NRZL), while the frame and subframe synchronisers have been designed to work upto 10 Mbps.
6

Bit Error Problems with DES

Loebner, Christopher E. 10 1900 (has links)
International Telemetering Conference Proceedings / October 25-28, 1993 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The Data Encryption Standard (DES) was developed in 1977 by IBM for the National Bureau of Standards (NBS) as a standard way to encrypt unclassified data for security protection. When the DES decrypts the encrypted data blocks, it assumes that there are no bit errors in the data blocks. It is the object of this project to determine the Hamming distance between the original data block and the data block after decryption if there occurs a single bit error anywhere in the encrypted bit block of 64 bits. This project shows that if a single bit error occurs anywhere in the 64-bit encrypted data block, a mean Hamming distance of 32 with a standard deviation of 4 is produced between the original bit block an the decrypted bit block. Furthermore, it is highly recommended by this project to use a forward error correction scheme like BCH (127, 64) or Reed-Solomon (127, 64) so that the probability of this bit error occurring is decreased.
7

Entangled qubit pairs

Nasser Metwally, Aly Mohamed. Unknown Date (has links) (PDF)
University, Diss., 2002--München.
8

Estimating the Characteristics of the Aeronautical Telemetry Channel during Bit Error Events

Law, Eugene L. 10 1900 (has links)
International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / This paper presents estimated aeronautical telemetry channel characteristics during bit error events. A T-39 aircraft was flown around various test corridors while transmitting a filtered 10 Mb/s pseudo-noise (PN) sequence binary phase shift keying (BPSK) signal. The received signal was down converted to 70 MHz, digitized when trigger criteria were met, and stored for later analysis. Received signal strength was also recorded. The first step in data analysis consisted of dividing the fast Fourier transform (FFT) of the recorded signal by the FFT of the expected signal. The received signal strength data was then used to correct for flat fade effects. The resulting signal is the difference (dB) between the expected signal at the receiver intermediate frequency (IF) output and the measured receiver IF output during the error event. This difference is the aeronautical telemetry channel characteristic. The characteristics of this difference signal were then matched against a 2-ray and 3-ray multipath fading model with reflected signal amplitude and path delay as the variables.
9

A PREDICTABLE PERFORMANCE WIDEBAND NOISE GENERATOR

Napier, T. M., Peloso, R.A. 11 1900 (has links)
International Telemetering Conference Proceedings / October 29-November 02, 1990 / Riviera Hotel and Convention Center, Las Vegas, Nevada / An innovative digital approach to analog noise synthesis is described. This method can be used to test bit synchronizers and other communications equipment over a wide range of data rates. A generator has been built which has a constant RMS output voltage and a well-defined, closely Gaussian amplitude distribution. Its frequency spectrum is flat within 0.3 dB from dc to an upper limit which can be varied from 1 Hz to over 100 MHz. Both simulation and practical measurement have confirmed that this generator can verify the performance of bit synchronizers with respect to the standard error rate curve.
10

Aspects of variables affecting the behaviour bottom hole assembly

Choi, W-G. January 1988 (has links)
No description available.

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