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Redesign eines DLX-Prozessormodells mit PipelineSchlenker, Thomas. January 1998 (has links)
Stuttgart, Univ., Fakultät Informatik, Diplomarb., 1998.
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Análise de desempenho de diversidade multiusuário com modulação adaptativa em canais em desvanecimento α-µAtaides, Kaiê Pimentel 03 March 2015 (has links)
Dissertação (mestrado)— Universidade de Brasília, Faculdade de Tecnologia, Departamento de Engenharia Elétrica, 2015. / Submitted by Ana Cristina Barbosa da Silva (annabds@hotmail.com) on 2015-06-23T17:57:40Z
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2015_KaiePimentelAtaides.pdf: 3642522 bytes, checksum: 9a615d0f47e5a6e09940a343fd9b73a2 (MD5) / O presente trabalho apresenta um estudo sobre o desempenho da modulação adaptativa com agendamento multiusuário em uma única célula de um sistema de rede celular, por meio de canais em desvanecimento α-µ independentes, mas não necessariamente identicamente distribuídos. Capacidade média de canal e eficiência espectral são obtidas em fórmulas fechadas e a taxa de erro de bit em fórmula exata, para esquemas potência-constante taxa-variável e potência-variável taxa-variável, considerando modulação de amplitude em quadratura MQAM. Os resultados são obtidos por meio de simulações computacionais em que os parâmetros da distribuição de desvanecimento são alterados de acordo com os ambientes de propagação aqui investigados. Por fim, todos os resultados são comparados, analisando vantagens e desvantagens de cada distribuição e eles mostram que a diversidade multiusuário traz um desempenho consideravelmente melhor, especialmente quando a flexibilidade dos ambientes em desvanecimento generalizado α-µ é considerada. / This project shows a study about the performance of adaptive modulation with single-cell multiuser scheduling over independent non-identically distributed α-µ fading channels. Average channel capacity and spectral efficiency are obtained in closed forms, and bit error rate in exact form, for constant-power variable-rate, and variable-power variable-rate schemes considering M-ary quadrature amplitude modulation M-QAM. The results are generated by computer simulations in which the parameters of the fading distribution are changed according to the propagation environments investigated. All the results are compared, showing advantages and disadvantages of each distribution, and they show that the multiuser diversity brings considerably better performance, specially when the flexibility of the generalized fading environments α-µ is considered.
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Microding the AMD 2900 bit-slice microprocessor of the graphics real-time animation display systemChau, Dominic Wah Yan. January 1984 (has links)
No description available.
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CONFIGURATION BIT STREAM GENERATION FOR THE MT-FPGA & ARCHITECTURAL ENHANCEMENTS FOR ARITHMETIC IMPLEMENTATIONSSAPRE, VISHAL 13 July 2005 (has links)
No description available.
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An adaptive multistage interference cancellation receiver for CDMAKaul, Ashish 13 February 2009 (has links)
Most of the previous research on multistage interference cancellation receivers for Code Division Multiple Access (CDMA) systems has relied on the use of simulation techniques for performance evaluation. This thesis formulates a model for an adaptive multistage interference cancellation receiver within a CDMA system to be employed at the cellular radio base station. A closed form expression for the probability of bit error for this adaptive multistage interference cancellation receiver is derived, using a Gaussian approximation for Multiple Access Interference (MAI). The Bit Error Rate (BER) after any stage of interference cancellation can be computed from the signal to noise ratio, number of users and processing gain of the CDMA system. The BER expressions are extended to derive asymptotic limits on the performance of interference cancellation as the number of cancellation stages approaches infinity, demonstrating a fundamental limit on the performance improvement that can be expected from any multistage interference cancellation scheme. Furthermore, the analysis quantifies conditions under which interference cancellation may degrade performance.
This thesis also extends a software implementation of the Multistage Rake receiver for a wide range of channel models including Gaussian noise, MAI, multipath propagation and near-far effects. Simulation results demonstrate the robustness of the Multistage Rake receiver to near-far effects and manifold capacity improvement compared to conventional demodulation techniques. / Master of Science
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PULSE SHAPED CONSTANT ENVELOPE 8-PSK MODULATION STUDYTao, Jianping 10 1900 (has links)
International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The most bandwidth-efficient communication methods are imperative to cope with the congested frequency bands. Pulse Shaping methods have excellent effects on narrowing bandwidth and increasing band utilization. The position of the baseband filters for the pulse shaping is crucial. Filters after the modulator will have non-constant envelope and before the modulator will have constant envelope. These two types have different effects on narrowing the bandwidth and producing bit errors. The constant envelope 8 PSK is used throughout the simulations and is compared with the non-constant envelope results. This work provides simulation results of spectrum analysis and measure of bit errors produced by pulse shaping in an AWGN channel.
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Read/write assist circuits and SRAM designNguyen, Quocdat Tai 23 September 2010 (has links)
This report discusses the design of read/write assist circuits which are used in a SRAM cell’s design to overcome the cell’s variations. It also explains the variability problems in a SRAM bit-cell and many approaches to address them. The basic operations, SNM concept, and write margin of an SRAM are described theoretically as well as measured in simulation. The write assisted circuit, the Negative Bit-line Voltage Bias scheme, is discussed and implemented at transistor level using a six-transistor (6T) SRAM cell. With the write assisted circuit, the implemented memory array successfully performs a write operation at 0.6V and -25°C, the condition in which the same operation would fail without the write assisted circuit. During the simulation, this write assisted circuit helps to achieve the negative bias voltage of -70mV on the SRAM’s bit-lines. The cost overhead includes chip area, power consumption, and current leakage when this Negative Bit-line Voltage scheme is implemented. / text
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Testování náhodnosti a použití statistických testů v kryptografii / Testování náhodnosti a použití statistických testů v kryptografiiNižnanský, Petr January 2013 (has links)
Pseudorandom generators belong to the primary focus of cryptology. The key to every cipher has to be generated at random, otherwise the security of the whole cipher is threatened. Another point of importance is the pseudorandom generators' close relationship to the stream ciphers. In this work, we first introduce statistical theory related to randomness testing. Then, we describe 8 classical statistical tests. We introduce a concept of next bit testing and derive variants of previous tests. Moreover, with this new battery of tests we examine the randomness of SHA-3 second round candidates and present the results. Also a sensitivity of tests is investigated and several useful transformations are shown. Powered by TCPDF (www.tcpdf.org)
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Contagem incremental de padrões locais em árvores de componentes para cálculo de atributos / Incremental counting of local patterns in component tree for attribute calculationSilva, Dênnis José da 26 October 2017 (has links)
Árvore de componentes é uma representação completa de imagens que utiliza componentes conexos dos conjuntos de níveis de uma imagem e a relação de inclusão entre esses componentes. Essas informações possibilitam diversas aplicações em processamento de imagens e visão computacional, e.g. filtros conexos, segmentação, extração de características entre outras. Aplicações que utilizam árvore de componentes geralmente computam atributos que descrevem os componentes conexos representados pelos nós da árvore. Entre esses atributos estão a área, o perímetro e o número de Euler, que podem ser utilizados diretamente ou indiretamente (para o cálculo de outros atributos). Os \"bit-quads\" são padrões de tamanho 2x2 binários que são agrupados em determinados conjuntos e contados em imagens binárias. Embora o uso de \"bit-quads\" resulte em um método rápido para calcular atributos em imagens binárias, o mesmo não ocorre para o cálculo de atributos dos nós de uma árvore de componentes, porque os padrões contados em um nó podem se repetir nos conjuntos de níveis da imagem e serem contados mais de uma vez. A literatura recente propõe uma adaptação dos bit-quads para o cálculo incremental e eficiente do número de buracos na árvore de componentes. Essa adaptação utiliza o fato de cada nó da árvore de componentes representar um único componente conexo e uma das definições do número de Euler para o cálculo do número de buracos. Embora essa adaptação possa calcular o número de Euler, os outros atributos (área e perímetro) não podem ser computados. Neste trabalho é apresentada uma extensão dessa adaptação de bit-quads que permite a contagem de todos os agrupamentos de bit-quads de maneira incremental e eficiente na árvore de componentes. De forma que o método proposto possa calcular todos os atributos que podem ser obtidos pelos bit-quads (além do número de buracos) em imagens binárias na árvore de componentes de maneira incremental. / Component tree is a full image representation which uses the connected components of the level sets of the image and these connected components\' inclusion relationship. This information can be used in various image processing and computational vision applications, e.g. connected filters, segmentation, feature extraction, among others. In general, applications which use component trees compute attributes that describe the connected components represented by the tree nodes. Attributes such as area, perimeter and Euler number, can be used directly or indirectly (when they are used to compute other attributes) to describe the component tree nodes in various applications. The bit-quads are binary patterns of size 2x2 that are grouped in determined sets and counted in binary images to compute area, perimeter (also their continuous approximation) and Euler number. Even though the bit-quads usage can yield an efficient method to compute binary image attributes, they cannot be used efficiently to compute attributes for all component tree nodes, since some bit-quads can be counted more than once over the level sets. An adaptation of the bit-quads has been proposed to compute efficiently and incrementally the number of holes for all component tree nodes. This adaptation uses the fact that each component tree node represents a unique connected component and one of Euler number definitions to compute the number of holes. Even though this adaptation can compute Euler number, it cannot compute other attributes derived from the bit-quads (area and perimeter). In this work, an extension of this adaptation is proposed to efficiently and incrementally count all bit-quads sets in a component tree. Moreover, it yields a method to compute all attributes which can be computed by the bit-quads in binary images in the component tree using an incremental strategy.
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Inverse Discrete Cosine Transform by Bit Parallel Implementation and Power ComparisionBhardwaj, Divya Anshu January 2003 (has links)
<p>The goal of this project was to implement and compare Invere Discrete Cosine Transform using three methods i.e. by bit parallel, digit serial and bit serial. This application describes a one dimensional Discrete Cosine Transform by bit prallel method and has been implemented by 0.35 ìm technology. When implementing a design, there are several considerations like word length etc. were taken into account. The code was implemented using WHDL and some of the calculations were done in MATLAB. The VHDL code was the synthesized using Design Analyzer of Synopsis; power was calculated and the results were compared.</p>
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