The design, simulation, and measurement of two bulk-driven down-conversion mixers with on-chip transformer baluns in 0.18 μm CMOS is presented. Applying either the RF signal or the local oscillator (LO) signal to the bulk connection of the transistors allows the amplification and switching stages of a conventional mixer to be combined into a single stage, thus improving the voltage headroom of the mixer. The addition of a transformer balun to the mixers improves the input impedance match, provides passive voltage gain, and performs single-ended to balanced conversion. A semi-analytical power-series analysis of the mixers is also presented. The mixer in which the RF signal is applied to the gates of the mixing transistors achieves a measured input-referred 1-dB compression point (P1dB) of −14 dBm, an input-referred third-order intercept point (IIP3) of −5.2 dBm, a gain of 13.6 dB, a noise figure (NF) of 26 dB, and an LO-to-RF isolation of 50 dB. The overall performance of both mixers is found to be comparable with other CMOS mixers, but with a higher noise figure (which can be mitigated with a high gain low-noise amplifier (LNA)).

The design, simulation, and measurement of two bulk-driven down-conversion mixers with on-chip transformer baluns in 0.18 μm CMOS is presented. Applying either the RF signal or the local oscillator (LO) signal to the bulk connection of the transistors allows the amplification and switching stages of a conventional mixer to be combined into a single stage, thus improving the voltage headroom of the mixer. The addition of a transformer balun to the mixers improves the input impedance match, provides passive voltage gain, and performs single-ended to balanced conversion. A semi-analytical power-series analysis of the mixers is also presented. The mixer in which the RF signal is applied to the gates of the mixing transistors achieves a measured input-referred 1-dB compression point (P1dB) of −14 dBm, an input-referred third-order intercept point (IIP3) of −5.2 dBm, a gain of 13.6 dB, a noise figure (NF) of 26 dB, and an LO-to-RF isolation of 50 dB. The overall performance of both mixers is found to be comparable with other CMOS mixers, but with a higher noise figure (which can be mitigated with a high gain low-noise amplifier (LNA)).

The design, simulation, and measurement of two bulk-driven down-conversion mixers with on-chip transformer baluns in 0.18 μm CMOS is presented. Applying either the RF signal or the local oscillator (LO) signal to the bulk connection of the transistors allows the amplification and switching stages of a conventional mixer to be combined into a single stage, thus improving the voltage headroom of the mixer. The addition of a transformer balun to the mixers improves the input impedance match, provides passive voltage gain, and performs single-ended to balanced conversion. A semi-analytical power-series analysis of the mixers is also presented. The mixer in which the RF signal is applied to the gates of the mixing transistors achieves a measured input-referred 1-dB compression point (P1dB) of −14 dBm, an input-referred third-order intercept point (IIP3) of −5.2 dBm, a gain of 13.6 dB, a noise figure (NF) of 26 dB, and an LO-to-RF isolation of 50 dB. The overall performance of both mixers is found to be comparable with other CMOS mixers, but with a higher noise figure (which can be mitigated with a high gain low-noise amplifier (LNA)). / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate