Switched Reluctance Machine (SRMs) are receiving significant attention for industries and homes in the last decade. Due to their rugged brushless design, high reliable and an outstanding performance over a wide speed range. The stator and rotor of an SRM have a double salient pole and the rotor has no windings and magnets, its torque generating is quite nonlinear and has high torque ripple. Therefore, sophisticated switching and control technologies are needed to improve its driving performance. The cost and performance of SRM drives are highly dependent on the converter topologies and motor structure, so that developments in the convert topologies have been made in parallel with motor design. The objective of this thesis is proposed three phase Switched Reluctance Machine using a fly back resistor C Dump Converter to replace the tradition Bridge Converter. It can reduce switching losses, to reduce converter production cost with a simpler circuit. At the end, a digital signal processor based control system is used to test the laboratory make drives .

The use of variable speed drive (VSD) systems in the appliance industry is growing due to emerging high volume of fractional horsepower VSD applications. Almost all of the appliance VSDs have no input power factor correction (PFC) circuits. This results in harmonic pollution of the utility supply which could be avoided. The impact of the PFC circuit in the overall drive system efficiency, harmonic content, magnitude of the system input current and input power factor is particularly addressed in this dissertation along with the development of analytical methods applicable to the steady-state analysis of input power factor corrected VSD systems. Three different types of motors - the switched reluctance motor (SRM), permanent magnet brushless dc motor (PMBDC) and dc motor (DCM) are employed in this study. The C-dump converter topology, a single switch per phase converter, is adopted for the prototype SRM- and PMBDC-based VSD systems. The conventional full-bridge converter is used for DCM-based VSD systems. Four-quadrant controllers, utilizing PI speed and current control loops for the PMBDC- and DCM-based VSD system, are developed and their design results are verified with experiment and simulation. A single-quadrant controller with a PI speed feedback loop is employed for the SRM-based VSD system. The analysis of each type of VSD system includes development of loss models and establishment of proper operational modes. The magnitude of the input current harmonic spectra is measured and compared with and without a front-end PFC converter. One electromagnetic compatibility (EMC) standard, IEC 1000-3-2 which describes the limitation on harmonic current emission is modified for 120V ac system. This modified standard is utilized as the reference to evaluate the measured input current harmonics. The magnitude of input current harmonics for a VSD system are greatly reduced with PFC preregulators. While the input PFC circuit draws a near sinusoidal current from an ac source, it lowers the overall VSD system efficiency and increases cost of the overall system. / Ph. D.