The filter complexity in the multi-stage decimation system of a Δ-Σ ADC increases progressively as one moves to higher stages of decimation due to the fact that the input word length of the higher stages also increases progressively. The main motivation for this thesis comes from the idea of investigating a way, to reduce the input word length in the later filter stages of the decimation system which could reduce the filter complexity. To achieve this, we use a noise-shaping loop between the first and later stages so that the input word length for the later stages remains smaller than in the case where we do not use the noise-shaping loop. However, the performance (SNR/ Noise-level) level should remain the same in both cases. This thesis aims at analyzing the implications of using a noise-shaping loop in between the decimation stages of a Δ-Σ ADC and also finding the appropriate decimation filter types that could be used in such a decimation system. This thesis also tries to compare the complexity introduced by using the noise-shaping loop with the reduction achieved in the later decimation stages in terms of the input word length. Filter required in the system will also be optimized using minimax optimization technique.

The doctoral thesis deals with development and design of novel architectures of digital filters for low-power integrated circuits. The main goal was to achieve optimum parameters of digital filters with respect to the chip area, power consumption and operating frequency. The target group of the proposed architectures are application specific integrated circuits designed for signal processing from sensors using delta-sigma modulators. Three novel architectures of digital filters optimized for low-power integrated circuits are presented in the thesis. The thesis provides analysis and comparison of parameters of the new filter architectures with the parameters of architectures generated by Matlab tool. A software tool has been designed and developed for the practical application of the proposed architectures of digital filters. The developed software tool allows generating hardware description of the filters with respect to defined parameters.

The aim of this thesis is to study the possibilities of spectrum calculations, as well as data transfer via USB 3.0 and data saving to a DDR3 memory via FPGA. The focus is also on design and realization of a spectral analyzer with a record of samples to DDR memory expnaded by a narrowband converter using gate arrays. The work is divided into two sections, the first one dealing with the theoretical background. The second part denotes the realization of the design. The result of this work is a signal analyzer in a FPGA controlled from a computer application via the USB 3.0 interface.

This thesis deals with design and realization of acoustic camera for sound source location. The essence of the device is microphone field listening for acoustic impulses which are processed in real-time in order to locate the source. Found location is displayed on LCD together with images from regular video camera. FPGA is used as a computational unit.

The aim of this work is to implement digital filters into programmable gate array. The work also includes a description of the MEMS technology, including comparisons with the technology of MEMS microphones from various manufacturers. Another part is devoted to the Sigma-delta modulation. The main section is the design and implementation of digital CIC and FIR filters for signal processing of digital microphone, including simulation and verification of properties of the proposed filter in Matlab.

This diploma thesis deals with the design and implementation of an electronic module for acoustic detection. The module has the task of detecting a predetermined acoustic signals through them learned classification model. The module is used mainly for security purposes. To identify and classify the proposed model using machine learning techniques. Given the possibility of retraining for a different set of sounds, the module becomes a universal sound detector. With acoustic sound using the digital MEMS microphone, for which it is designed and implemented conversion filter. The resulting system is implemented into firmware microcontroller with real time operating system. The various functions of the system are realized with regard to the possible optimization (less powerful MCU or battery power). The module transmits the detection results of the master station via Ethernet network. In the case of multiple modules connected to the network to create a distributed system, which is designed for precise time synchronization using PTP protocol defined by the IEEE-1588 standard.