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Polarisation-based wavelength-division multi-/demulti-plexers (WDMs) and filters have been designed, constructed and evaluated. These are compact devices made from single-mode optical fibre possessing high linear birefringence. Ihe WDMs accept two input wavelengths in a common state of polarisation, and produce orthogonally polarised outputs which are spatially separated using a polarisation-selective element. The maximum separation demonstrated is 1.5 nm, and the minimum 0.04 nm, which is two orders of magnitude better than that achieved b most other in-line WDMs. A few metres of fibre only are required. Instantaneous cross- talk values below -15 dB have been measured experimentally, and theoretical analysis of the devices predicts that values below -28 dB should be attainable. Temperature sensitivity currently limits long-term cross-talk, but also offers the possibility of tuning the centre wavelength. Methods of reducing environmental sensitivity include judicious choice of fibre type and appropriate packaging of the WDMs. These techniques are investigated and discussed. Incorporation of the WDMs in optical fibre sensing networks is demonstrated, as is separation of frequency-shifted stimulated Brillouin scattered light, generated in a fibre, from the pump frequency. Filters are constructed using concatenated sections of birefringent fibre, positioned between two polarisers. Rotation of the polarisation azimuth between sections is achieved by twistíng portions of the fibre to induce circular birefringence. Thus devices are made from a single strand of linearly birefringent fibre, less than one metre in length. Passband widths and separations are selected b changing the number of twisted sections in the filter, and altering lengths and twist angles of sections. A minimum passband width ofI0 nm has been demonstrated, at a passband separation of60 nm. Environmental stability is suíciently good for the devices to be operated as passive components.

Better performance has been one of the main motivations behind the recent resurgence of interest in asynchronous circuits (no matter whether this is always true or not). We are particularly interested in the performance of pipelines since they are used extensively in current digital systems. There exists an algorithm that can find the exact upper and lower bounds on the separation time of events in a certain class of process graphs. However, some transformations and complex mathematical analyses, such as graph decomposition for infinite unfolded process graphs must be employed in order to reach exact bounds. This algorithm may be a good candidate for the application of CAD tool development and circuit synthesis, but it tends to block designers from visualizing what factors really affect the performance of asynchronous circuits. In this thesis, a simple approach is adopted to approximate the performance bounds. Since our method is a symbolic approach instead of a numerical approach, it allows designers to analyze the circuit performance while providing design guidelines and approaches at the same time. Our approach has two steps. First, several basic modules are chosen, including FIFO, Fork, Join, Toggle/XOR, Arbiter/Call and Select/XOR. The individual output loop delay, equivalent input delay and equivalent output delay are derived based on the Equal loopdelay theorem. The result is a set of difference equations. The performance approximation can be obtained with simple mathematical operations on the difference equations, given the bounds of stagedelays. That is, the performance bounds of output loop delay, equivalent input delay and equivalent output delay can be represented as the bounds of stagedelays. Second, for a larger system consisting of those basic modules, its performance bounds can be derived directly from the bounds of output loop delay, equivalent input delay and equivalent output delay of those basic modules which have been obtained already. This approach allows a fast and easy calculation of performance bounds, avoiding the need to rederive the difference equations for the whole system. Both modular design and performance approximation are possible with our approach. / Graduation date: 1997

Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 102-107). Available also in a digital version from Dissertation Abstracts.

Reproduction de : Thèse de doctorat : Informatique : Grenoble, INPG : 1990. / Titre provenant de l'écran-titre. Bibliogr. p. 251-268.

Reproduction de : Thèse de docteur-ingénieur : informatique : Grenoble, INPG : 1984. / Titre provenant de l'écran-titre.

Reproduction de : Thèse de 3e cycle : informatique : Grenoble, INPG : 1984. / Titre provenant de l'écran-titre. Bibliogr.

Reproduction de : Thèse de doctorat : informatique : Grenoble, INPG : 1984. / Titre provenant de l'écran-titre. Bibliogr. p. 101-106.

Reproduction de : Thèse de 3e cycle : informatique : Grenoble, INPG : 1984. / Titre provenant de l'écran-titre. Bibliogr. p. 269-275.

Reproduction de : Thèse de docteur-ingénieur : informatique : Grenoble, INPG : 1984. / Titre provenant de l'écran-titre.