Thesis (Ph. D.)--University of Washington, 2002. / Vita. Includes bibliographical references (leaves 224-232).

This dissertation addresses three fundamental problems with the network software as it is currently designed and implemented: the poor performance of high modular (or layered) protocols, network software's inability to keep up with the rapid changes in the networking technology and applications demands, and the inordinate amount of time it takes to produce new network protocols. These problems are solved through the use of a new platform for the implementation and execution of network protocols, a new methodology for the design of network protocols and a new network architecture a new network architecture. Avoca is the result of taking a coordinated approach to network software design, implementation, and standardization and consists of three parts: the Avoca platform, the Avoca methodology and the Avoca Network Architecture. The Avoca platform is a small operating systems kernel designed from scratch to implement network protocols efficiently. The Avoca methodology (or Meta-Protocol) is set of rules governing the design and implementation of network protocols implemented on the Avoca platform. The Avoca Network Architecture is a novel architecture explicitly designed to support the rapidly changing networking environment. Using Avoca highly layered network software can be implemented efficiently. Avoca proves that modularity is not inherently slow. Avoca supports the encapsulation, underspecification, composition and reuse of protocols will demonstrated. Avoca shows that network software is amenable to the use of software engineering techniques to improve the protocol implementation process. Finally, Avoca demonstrates that a network architecture flexible enough to support a rapidly changing networking environment is possible.

Recent studies point to major problems in today's software systems. Problems in cost, reliability, maintainability, and poor responsiveness to user requirements have their origin in the early phases of the system development effort. Although increasing awareness of poor design practice has stimulated several research efforts toward making the "detailed design" process more "systematic," there is a significant need for a computer-aided methodology to help designers cope with the complex design process. A framework is established for organizing activities in support of one important aspect of "detailed design," the organization of processes into appropriate process groups and program modules. A computer-aided methodology is presented for analysis of variety of inter-process relationships in the determination of effective modularizations. The proposed methodology extends current software engineering practice through partial automation of an important software engineering problem, the effective structuring of processes according to multiple design criteria. Multiple design criteria are used to determine inter-process relationships. The system accomodates a number of design criteria including volume of data transport, distribution of data references, information and control distribution. The methodology begins with the assignment of a graph structure to subsystem components and their interdependencies. The resulting graph is partitioned in determination of subgraphs (modules) with strong intra-dependencies and weak inter-dependencies. The set of subgraphs define modules which satisfy principles of high module strength and low module coupling. The decomposition method used also produces a hierarchical structure of modules with little resource sharing. The resulting design limits "reference distribution" and "information distribution" between modules, which results in reduction of complexity of the total structure. Analytical tools in support of these activities are presented to illustrate support of the methodology by a pilot study.

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This thesis presents an overarching plan to migrate a time-optimal spacecraft control algorithm from the MATLABTM development environment into an FPGA-based embedded-platform development board. Research at the Naval Postgraduate School has produced a revolutionary time-optimal spacecraft control algorithm based upon the Legendre Pseudospectral method. Currently, the control algorithm is dependent on the MATLABTM environment, a fourth generation language (4GL). 4GLs are powerful high-level abstraction and development tools, but are not efficiently instantiated into an embedded system. This study establishes three distinct development phases to migrate the algorithm from 4GL dependency to embedded operation. The first phase removes the algorithm's dependency on the 4GL environment by translating the algorithm into the C programming language. The second development phase compiles and embeds the algorithm into an FPGA-based development board. The final development phase introduces a custom computing machine (CCM) instantiated in an FPGA to reduce the control calculation time, thereby broadening the algorithm's potential application.

This thesis presents the use of a field programmable gate array (FPGA) to implement a non-coherent binary-frequency-shift-keyed receiver-transmitter (BFSK-RT) that simulates the modulation of the SINCGARS radio, the RT-1523C. An FPGA successfully, and with very few resources, implemented the desired modulation and demodulation. Topics covered include FPGA history, the hardware and software utilized, a summary of the SINCGARS RT-1523C characteristics, the BFSK-RT on FPGA design procedure and the design results.

This thesis presents the use of a Field Programmable Gate Array (FPGA) to control two Commercial-Off-The-Shelf (COTS) Power Electronic Building Blocks (PEBB) configured to produce a three-phase low distortion sine wave output. The next generation warship is expected to contain more electric loads that require quality variable frequency output. A typical propulsion motor in the 40MW range will probably require the current Total Harmonic Distortion to be less than 3% (MIL-STD-1399). However, high power low distortion inverters usually have associated high cost and weight penalties. This thesis presents a parallel hybrid converter which demonstrates the use of a high power low fidelity bulk inverter with a low power high fidelity active filter. The high power low fidelity output is sourced using a six-step inverter which produces the entire fundamental current. The low power hysteresis controlled active filter section produces only cancelling harmonic current. The paralleled result is a pristine output sine wave with a 1% current Total Harmonic Distortion (THD). This solution should offer the Navy a high fidelity high power inverter without the cost and weight penalties. / US Navy (USN) author.

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