In this master thesis, the possibilities of customizing a low-cost microprocessor with the purpose of replacing an existing microprocessor solution are investigated. A brief survey of suitable processors is carried out wherein a replacement is chosen. The replacement processor is then analyzed and extended with accelerators in order to match set requirements. The result is a port of the processor Lattice Mico32 for the FPGA curcuit Xilinx Virtex-5 which replaces an earlier solution using Xilinx MicroBlaze. To reach the set requirements, accelerators for floating point arithmetics and FIR filtering have been developed. The toolchain for the processor has been modified to support the addition of accelerated floating point arithmetics. A final evaluation of the presented solution shows that it fulfills the set requirements and constitutes a functional replacement for the previous solution.

The well-known software company, Google,announced a new handset platform named Android on 5 November 2007, which makes a dramatic impact on the mobile platform market. Later, Open Handset Alliance (OHA) continues to develop Android platform, and to date, the mobile development platform has become the most popular one. However, how to save the power and extend the waiting time are important issues to both academic and industrial communities. Currently, there are few intelligent programs developed to save the power at the Android Market, and these programs are usually short of some functions. Moreover,the Android SDK provides no setting functions to adjust the CPU state. So this paper studies and develops several kernel programs. The targets of our programs are to not only monitor common-use programs on the background, but also dynamically adjust the CPU frequency on the platform according to application programs on executing.Several interfaces are provided such that users can manually adjust the mode and frequency of CPU, view the statistic information, and so on. Furthermore, we also collect many settings of saving the power into our program, which makes users straightforward and easy to manipulate.

CPU heat sinks with high efficiency of heat transfer are greatly demanded for a personal computer with high-speed computational ability. In recent years, the manufacturing technology of CPU heat sinks has got much attention and becomes indispensable for developing the high-performance CPUs.In this study, some different design criteria for the flow guide and die are proposed during an extrusion process with complex cross-sectional shapes, such as CPU heat sinks. The plastic flow pattern of the billet inside the die cavity is analyzed by using a commercial finite element package ¡§DEFORM 3D¡¨.The extrusion load, the stress and strain distribution of die, and the curvature of the product are investigated. Taguchi method is used to find the optimum extrusion condition of the die parameters. In addition, the experiments of extrusion using Al 6061 were carried out. The plastic flow pattern of the billet within the die and the dead metal zones were observed. The experimental data were compared with the analytical values to verify the validity of the proposed analytical models.

<p>Examensarbetet har utförts i samarbete med ROL Ergo i Hovslätt som tillverkar höj- och sänkbara bordsstativ. ROL Ergo monterar och säljer endast bordsstativet, inte bordsskivan. Problemet är att de flesta CPU-hållare och kabelkanaler fästs i bordsskivan.</p><p>En CPU-hållare bär upp datorns chassi och en kabelkanal används för att samla ihop kablarna. Användandet av en CPU-hållare och kabelkanal ger ett mer städat och välkomnande intryck vid kontorsarbetsplatsen.</p><p>Målet med arbetet är att ta fram ett koncept med CPU-hållare och kabelkanal som går att kombinera med de olika bordsstativen samt CAD-ritningar och en konkurrentanalys.</p><p>I kapitlet Teoretisk referensram beskrivs de olika metoderna som används i produktutvecklingsprocessen. I kapitlet Genomförande används de olika metoderna för att uppnå ett resultat. Genomförandedelen är uppdelad i Projektplanering, Definiering, Konceptutveckling och Konstruktion enligt produktutvecklingsprocessen.</p><p>Resultatet består av en CPU-hållare och en kabelkanal som är anpassade till ROL Ergos bordsstativ. Hållaren består av ett bockat rör och två stänger. Kabelkanalen består av två krokar och en kanal. Produkterna är utformade för att passa i befintliga hål i stativet. CPU-hållarens öppna konstruktion gör den användarvänlig då sladdar m.m. är enkla att komma åt. Konstruktionen på kabelkanalen gör den intressant och spännande och då den går att haka ner blir även den användarvänlig.</p>

The focus of this dissertation is adaptive CPU-budget allocation for periodic soft-real-time applications. The presented algorithms are developed in the context of a power-management framework. First, the prediction-based bandwidth scheduler (PBS) is developed. This algorithm is designed to adapt CPU-budget allocations at a faster rate than previous adaptive algorithms. Simulation results are presented to demonstrate that this approach allows for a faster response to under allocations than previous algorithms. A second algorithm is presented called Two-Stage Prediction (TSP) that improves on the PBS algorithm. Specifically, a more sophisticated algorithm is used to predict execution times and a stronger guarantee is provided on the timeliness of jobs. Implementation details and experimental results are presented for both the PBS and TSP algorithms. An abstraction is presented called virtual instruction count (VIC) to allow for more efficient budget allocation in power-managed systems. Power management decisions affect job-execution times. VIC is an abstract measure of computation that allows budget allocations to be made independent of power-management decisions. Implementation details and experimental results are presented for a VIC-based budget mechanism. Finally, a power-management framework is presented called the linear adaptive models based system (LAMbS). LAMbS is designed to minimize power consumption while honoring budget allocations specified in terms of VIC.

A caracterização de desempenho e uma atividade fundamental na area de controle industrial. Por se tratar, na maior parte das vezes, de aplicações de tempo real, a caracterização de desempenho torna-se ainda mais necessária e importante. Entretanto, atualmente não há nenhuma metodologia estabelecida para realizar esta caracterização. Não há nem mesmo um conjunto de parâmetros que devem ser avaliados em um equipamento de controle utilizado em processos industriais. Para tentar suprir esta carência, este trabalho apresenta uma proposta de métricas e workloads para serem utilizados na avaliação de desempenho de sistemas de controle baseados em CLPs e CPUs Industriais. O processo de avaliação de desempenho e discutido em todas as etapas, desde o estudo da aplicação at e a execução dos passos de caracterização de desempenho. Para ilustrar a aplicação das métricas, técnicas e procedimentos propostos, são avaliadas três CPUs Industriais, e os resultados s~ao apresentados ao nal do trabalho. Espera-se assim estar contribuindo para o estabelecimento de uma metodologia padronizada para avaliação de desempenho de equipamentos de controle industrial.

A caracterização de desempenho e uma atividade fundamental na area de controle industrial. Por se tratar, na maior parte das vezes, de aplicações de tempo real, a caracterização de desempenho torna-se ainda mais necessária e importante. Entretanto, atualmente não há nenhuma metodologia estabelecida para realizar esta caracterização. Não há nem mesmo um conjunto de parâmetros que devem ser avaliados em um equipamento de controle utilizado em processos industriais. Para tentar suprir esta carência, este trabalho apresenta uma proposta de métricas e workloads para serem utilizados na avaliação de desempenho de sistemas de controle baseados em CLPs e CPUs Industriais. O processo de avaliação de desempenho e discutido em todas as etapas, desde o estudo da aplicação at e a execução dos passos de caracterização de desempenho. Para ilustrar a aplicação das métricas, técnicas e procedimentos propostos, são avaliadas três CPUs Industriais, e os resultados s~ao apresentados ao nal do trabalho. Espera-se assim estar contribuindo para o estabelecimento de uma metodologia padronizada para avaliação de desempenho de equipamentos de controle industrial.

Context. In the field of computer science, the concept of cloud computing plays a prominent role which can be hosted on the internet to store, manage and also to process the data. Cloud platforms enables the users to perform large number of computing tasks across the remote servers. There exist several cloud platform providers like Amazon, Microsoft, Google, Oracle and IBM. Several conventional databases are available in cloud service providers in order to handle the data. Cassandra is a NoSQL database system which can handle the unstructured data and can scale large number of operations per second even across multiple datacentres. Objectives. In this study, the performance evaluation of NoSQL database in AWS cloud service provider has been performed. The performance evaluation of a three node Cassandra cluster is performed for different configuration of EC2 instances. This performance has been evaluated using the metrics throughput and CPU utilization. The main aim of this thesis was to evaluate the performance of Cassandra under various configurations with the YCSB benchmarking tool. Methods. A literature review has been conducted to gain more knowledge about the current research area. The metrics required to evaluate the performance of Cassandra were identified through literature study. The experiment was conducted to compute the results for throughput and CPU utilization under the different configurations t2.micro, t2.medium and t2.small for 3 node and 6 node cluster using YCSB benchmarking tool. Results. The results of the experiment include the metrics, throughput and CPU utilization which were identified in the literature review. The results calculated were plotted as graphs to compare their performance for three different configurations. The results obtained were segregated as two different scenarios which were for 3 node and 6 node clusters. Conclusions. Based on the obtained values of throughput the optimal or sub-optimal configuration of a data centre running multiple instances of Cassandra such that the specific throughput requirements are satisfied.

This thesis describes the design of a domain specific DSP processor. The thesis is divided into two parts. The first part gives some theoretical background, describes the different steps of the design process (both for DSP processors in general and for this project) and motivates the design decisions made for this processor. The second part is a nearly complete design specification. The intended use of the processor is as a platform for hardware acceleration units. Support for this has however not yet been implemented.

Autoliv has developed the Night Vision system, which is a safety system for use incars to improve the driver’s situational awareness during night conditions. It is areal-time system that is able to detect pedestrians in the traffic environment andissue warnings when there is a risk of collision. The timing behaviour of programsrunning on real-time systems is vital information when developing and optimisingboth hardware and software. As a part of further developing their Night Visionsystem, Autoliv wanted to examine detailed timing behaviour of a specific part ofthe Night Vision algorithm, namely the Tracking module, which tracks detectedpedestrians. Parallel to this, they also wanted a reliable method to obtain timingdata that would work for other parts of that system as well, or even other applications. A preliminary study was conducted in order to determine the most suitable methodof obtaining the timing data desired. This resulted in a measurement-based approachusing software profiling, in which the Tracking module was measured usingvarious input data. The measurements were performed on simulated hardwareusing both a cycle accurate simulator and measurement tools from the systemCPU manufacturer, as well as tools implemented specifically to handle input andoutput data. The measurements resulted in large amounts of data used to compile performancestatistics. Using different scenarios in the input data, we were able to obtain timingcharacteristics for several typical situations the system may encounter duringoperation. By manipulating the input data we were also able to observe generalbehaviour and achieve artificially high execution times, which serves as indicationson how the system responds to irregular and unexpected input data. The method used for collecting timing information was well suited for this particularproject. It provided the possibility to analyse behavior in a better waythan other, more theoretical, approaches would have. The method is also easilyadaptable to other parts of the Night Vision system, or other systems, with onlyminor adjustments to measurement environment and tools.