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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Cross-core Microarchitectural Attacks and Countermeasures

Irazoki, Gorka 24 April 2017 (has links)
In the last decade, multi-threaded systems and resource sharing have brought a number of technologies that facilitate our daily tasks in a way we never imagined. Among others, cloud computing has emerged to offer us powerful computational resources without having to physically acquire and install them, while smartphones have almost acquired the same importance desktop computers had a decade ago. This has only been possible thanks to the ever evolving performance optimization improvements made to modern microarchitectures that efficiently manage concurrent usage of hardware resources. One of the aforementioned optimizations is the usage of shared Last Level Caches (LLCs) to balance different CPU core loads and to maintain coherency between shared memory blocks utilized by different cores. The latter for instance has enabled concurrent execution of several processes in low RAM devices such as smartphones. Although efficient hardware resource sharing has become the de-facto model for several modern technologies, it also poses a major concern with respect to security. Some of the concurrently executed co-resident processes might in fact be malicious and try to take advantage of hardware proximity. New technologies usually claim to be secure by implementing sandboxing techniques and executing processes in isolated software environments, called Virtual Machines (VMs). However, the design of these isolated environments aims at preventing pure software- based attacks and usually does not consider hardware leakages. In fact, the malicious utilization of hardware resources as covert channels might have severe consequences to the privacy of the customers. Our work demonstrates that malicious customers of such technologies can utilize the LLC as the covert channel to obtain sensitive information from a co-resident victim. We show that the LLC is an attractive resource to be targeted by attackers, as it offers high resolution and, unlike previous microarchitectural attacks, does not require core-colocation. Particularly concerning are the cases in which cryptography is compromised, as it is the main component of every security solution. In this sense, the presented work does not only introduce three attack variants that can be applicable in different scenarios, but also demonstrates the ability to recover cryptographic keys (e.g. AES and RSA) and TLS session messages across VMs, bypassing sandboxing techniques. Finally, two countermeasures to prevent microarchitectural attacks in general and LLC attacks in particular from retrieving fine- grain information are presented. Unlike previously proposed countermeasures, ours do not add permanent overheads in the system but can be utilized as preemptive defenses. The first identifies leakages in cryptographic software that can potentially lead to key extraction, and thus, can be utilized by cryptographic code designers to ensure the sanity of their libraries before deployment. The second detects microarchitectural attacks embedded into innocent-looking binaries, preventing them from being posted in official application repositories that usually have the full trust of the customer.
2

Spectre: Attack and Defense

Harris, Rae 01 January 2019 (has links)
Modern processors use architecture like caches, branch predictors, and speculative execution in order to maximize computation throughput. For instance, recently accessed memory can be stored in a cache so that subsequent accesses take less time. Unfortunately microarchitecture-based side channel attacks can utilize this cache property to enable unauthorized memory accesses. The Spectre attack is a recent example of this attack. The Spectre attack is particularly dangerous because the vulnerabilities that it exploits are found in microprocessors used in billions of current systems. It involves the attacker inducing a victim’s process to speculatively execute code with a malicious input and store the recently accessed memory into the cache. This paper describes the previous microarchitecture side channel attacks. It then describes the three variants of the Spectre attack. It describes and evaluates proposed defenses against Spectre.
3

Dynamic Eviction Set Algorithms and Their Applicability to Cache Characterisation

Lindqvist, Maria January 2020 (has links)
Eviction sets are groups of memory addresses that map to the same cache set. They can be used to perform efficient information-leaking attacks against the cache memory, so-called cache side channel attacks. In this project, two different algorithms that find such sets are implemented and compared. The second of the algorithms improves on the first by using a concept called group testing. It is also evaluated if these algorithms can be used to analyse or reverse engineer the cache characteristics, which is a new area of application for this type of algorithms. The results show that the optimised algorithm performs significantly better than the previous state-of-the-art algorithm. This means that countermeasures developed against this type of attacks need to be designed with the possibility of faster attacks in mind. The results also shows, as a proof-of-concept, that it is possible to use these algorithms to create a tool for cache analysis.
4

Side-channel Threats on Modern Platforms: Attacks and Countermeasures

Zhang, Xiaokuan January 2021 (has links)
No description available.
5

Ανάλυση επιθέσεων πλαγίου καναλιού σε κρυπτοσύστημα AES με χρήση προσομοιωτή επεξεργαστή

Καλόγριας, Απόστολος 07 June 2010 (has links)
Ένας από τους πιο ευρέως γνωστούς αλγορίθμους κρυπτογράφησης είναι ο AES (Advanced Encryption Standard). Το πρότυπο κρυπτογράφησης AES περιγράφει μια διαδικασία κρυπτογράφησης ηλεκτρονικής πληροφορίας βασισμένη στην λογική της κωδικοποίησης ομάδων δεδομένων με κάποιο μυστικό κλειδί. Μέχρι τον Μάιο του 2009, οι μόνες επιτυχημένες δημοσιευμένες επιθέσεις ενάντια στο πρότυπο AES ήταν επιθέσεις πλάγιου-καναλιού σε συγκεκριμένες εφαρμογές. Η βασική ιδέα των επιθέσεων πλαγίου καναλιού είναι ότι κάποιος μπορεί να παρατηρήσει έναν αλγόριθμο ο οποίος εκτελείται σε ένα σύστημα επεξεργασίας και να εξάγει μερικές ή πλήρεις πληροφορίες για την κατάσταση του αλγορίθμου ή το κλειδί. Ένας συγκεκριμένος τύπος επιθέσεων πλάγιου καναλιού, cache επιθέσεις, βασίζεται στην παρακολούθηση της συμπεριφοράς της μνήμης cache των συστημάτων (την μετακίνηση των δεδομένων μέσα και έξω από την μνήμη cache). Σε αυτή την διπλωματική αναπτύχθηκε ένα πρόγραμμα κρυπτογράφησης/αποκρυπτογράφησης AES και μελετήθηκε η συμπεριφορά διάφορων μνημών cache μέσω ενός προσομοιωτή επεξεργαστή (Simplescalar) κατά την διάρκεια εκτέλεσής του. Σκοπός της διπλωματικής εργασίας ήταν να δείξουμε ότι το κρυπτοσύστημα AES είναι ευάλωτο σε επιθέσεις πλαγίου καναλιού κρυφής μνήμης. / AES (Advanced Encryption Standard) is one of the most popular cryptographic algorithms. AES describes a process of electronic data encryption based on encrypting data using a secret key. Up to May 2009, the only successful published attacks against AES were side-channel attacks. The main concept of side-channel attacks is that someone can observe an algorithm that is being implemented in a system and gain information about the state of the algorithm or the secret key. One particular type of side-channel attacks, cache-based attacks, is based on observing the behavior of the system’s cache memory (tha data that moves in and out of the cache memory). In this thesis an algorithm AES (encryption/decryption) was developed and we examined the behavior of different cache memories using a simulator (Simplescalar) while this algorithm was processing trying to figure out if AES is vulnerable to cache-based side channel attacks. This thesis shows if AES is vulnerable against cache-based side channel attacks.

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