For the future of sustainable energy, renewable energy will need to significantly penetrate existing utility grids. While various renewable energy sources are networked with high-voltage DC grids, integration between these high-voltage DC grids and the existing AC grids is a significant technical challenge. Among the limited choices available, the modular multi-level converter (MMC) is the most prominent interface converter used between the DC and AC grids. This subject has been widely pursued in recent years. One of the important design challenges when using an MMC is to reduce the capacitor size associated with each module. Currently, a rather large capacitor bank is required to store a certain amount of line-frequency related circulating energy. Several control strategies have been introduced to reduce the capacitor voltage ripples by injecting certain harmonic current. Most of these strategies were developed using trial and error and there is a lack of a systematic means to address this issue. Most recently, Yadong Lyu has proposed to control the modulation index in order to reduce capacitor ripples. The total elimination of the unwanted circulating power associated with both the fundamental line frequency and the second-order harmonic was demonstrated, and this resulted in a dramatic reduction in capacitor size. To gain a better understanding of the intricate operation of the MMC, this thesis proposes a state-space analysis technique in the present paper. Combining the power flow analysis with the state trajectory portrayed on a set of two-dimensional state plans, it clearly delineates the desired power transfer from the unwanted circulating energy, thus leading to an ultimate reduction in the circulation energy and therefore the required capacitor volume. / Master of Science

Three-level diode-clamped inverter is being widely used these days. Extensive research has been carried out on pulse width modulation (PWM) strategies for a three-level inverter. The most widely used PWM strategies are sine-triangle pulse width modulation (SPWM) and centered space vector pulse width modulation (CSVPWM). The influence of these PWM strategies on the DC-link capacitor current and voltage ripple is studied in this thesis. The sizing of the DC capacitor depends on value of the maximum RMS current flowing through it. In this work, an analytical expression for capacitor RMS current is derived as a function of operating conditions like modulation index, power factor angle of the load and peak load current. The worst case current stress on the capacitor is evaluated using the analytical expression. The capacitor RMS current is found to be the same in SPWM and CSVPWM schemes. The analytical expression is validated through simulations and experiments on a 3kVA MOSFET based three-level inverter. Harmonic analysis of the capacitor current is helpful in better evaluation of capacitor power loss. Therefore, harmonic analysis of the capacitor current is carried out, using the techniques of geometric wall model and double Fourier integral for SPWM and CSVPWM schemes. The theoretical predictions are validated through experiments. The capacitor RMS current is divided into low-frequency RMS current (where low frequency component is defined as a component whose frequency is less than half the switching frequency) and high-frequency RMS current. The capacitor voltage ripple is estimated analytically for SPWM and CSVPWM schemes, using the low-frequency and high-frequency capacitor RMS current. The voltage ripples due to SPWM and CSVPWM schemes are compared. It is found that the voltage ripple with SPWM is higher than that with CSVPWM. A simplified method to estimate the capacitor power loss, without the requirement of FFT analysis of capacitor current, is proposed. The results from this simplified method agree reasonably well with the results from the detailed method. A space vector based modulation scheme is proposed, which reduces the capacitor RMS current at high power factor angles. However, the proposed method leads to higher total harmonic distortion (THD) than CSVPWM. Simulation and experimental results, comparing CSVPWM and the proposed PWM, are presented.