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Design and analysis of architectures for programmable network processing systems /Crowley, Patrick January 2003 (has links)
Thesis (Ph. D.)--University of Washington, 2003. / Vita. Includes bibliographical references (p. 134-142).
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The extensible run-time infrastructure (XRTI) : an experimental implementation of proposed improvements to the high level architecture /Kapolka, Andrzej. January 2003 (has links) (PDF)
Thesis (M.S. in Modeling, Virtual Environments and Simulation)--Naval Postgraduate School, December 2003. / Thesis advisor(s): Michael Zyda, Bret Michael. Includes bibliographical references (p. 111-114). Also available online.
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A hypermedia representation of a taxonomy of usability characteristics in virtual environments /Tokgoz, Asim. January 2003 (has links) (PDF)
Thesis (M.S. in Modeling, Virtual Environments and Simulation)--Naval Postgraduate School, March 2003. / Thesis advisor(s): Rudolph P. Darken, Joseph A. Sullivan. Includes bibliographical references (p. 137-140). Also available online.
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Algorithms for efficient state space search /Ganai, Malay Kumar. January 2001 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2001. / Vita. Includes bibliographical references (leaves 117-128). Available also in a digital version from Dissertation Abstracts.
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Security architects in practiceLakshminarayanan, Vidya L. 01 September 2015 (has links)
While security has long been a significant issue in military systems, the spread of the internet has stimulated a growing interest in, and increasing demand for, secure systems. Understanding how architects manage security requirements in practice is a necessary first step in providing repeatable processes using effective techniques, methods, and architectural structures. In this thesis, I present the results of multiple cases of practicing security architects: key aspects in security requirements, critical issues in managing security requirements, essential characteristics of security architects, how architects define security architecture, and how requirements are transformed into architectures and implemented.
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Load balancing strategies for parallel architecturesIqbal, Saeed 28 August 2008 (has links)
Not available / text
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Scalable primary cache memory architecturesAgarwal, Vikas 28 August 2008 (has links)
Not available / text
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Polymorphous architectures: a unified approach for extracting concurrency of different granularitiesSankaralingam, Karthikeyan 28 August 2008 (has links)
Not available / text
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Techniques to improve the hard and soft error reliability of distributed architecturesShivakumar, Premkishore 28 August 2008 (has links)
Not available / text
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Constructing adaptable and scalable synthetic benchmarks for microprocessor performance evaluationJoshi, Ajay Manohar, 1976- 28 August 2008 (has links)
Benchmarks set standards for innovation in computer architecture research and industry product development. Consequently, it is of paramount importance that the benchmarks used in computer architecture research and development are representative of real-world applications. However, composing such representative workloads poses practical challenges to application analysis teams and benchmark developers - (1) Benchmarks that are standardized are open-source whereas applications of interest are typically proprietary, (2) Benchmarks are rigid, measure single-point performance, and only represent a sample of the application behavior space (3) Benchmark suites take several years to develop, but applications evolve at a faster rate, and (4) Benchmarks geared towards temperature and power characterization are difficult to develop and standardize. The objective of this dissertation is to develop an adaptive benchmark generation strategy to construct synthetic benchmarks to address these benchmarking challenges. We propose an approach for automatically distilling key hardware-independent performance attributes of a proprietary workload and capture them into a miniature synthetic benchmark clone. The advantage of the benchmark clone is that it hides the functional meaning of the code, but exhibits similar performance and power characteristics as the target application across a wide range of microarchitecture configurations. Moreover, the dynamic instruction count of the synthetic benchmark clone is substantially shorter than the proprietary application, greatly reducing overall simulation time -- for the SPEC CPU 2000 suite, the simulation time reduction is over five orders of magnitude compared to the entire benchmark execution. We develop an adaptive benchmark generation strategy that trades off accuracy to provide the flexibility to easily alter program characteristics. The parameterization of workload metrics makes it possible to succinctly describe an application's behavior using a limited number of fundamental program characteristics. This provides the ability to alter workload characteristics and construct scalable benchmarks that allows researchers to explore a wider range of the application behavior space, conduct program behavior studies, and model emerging workloads. The parameterized workload model is the foundation for automatically constructing power and temperature oriented synthetic workloads. We show that machine learning algorithms can be effectively used to search the application behavior space to automatically construct benchmarks for evaluating the power and temperature characteristics of a computer architecture design. The need for a scientific approach to construct synthetic benchmarks, to complement application benchmarks, has long been recognized by the computer architecture research community, and this dissertation work is a significant step towards achieving that goal.
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