Channel sharing is known as a unique solution to satisfy the increasing demand for the spectral-efficient communication. In the channel sharing technique, several users concurrently communicate through a shared wireless medium. In such a scheme, the interference of users over each other is the main source of impairment. The task of performance evaluation and signaling design in the presence of such interference is known as a challenging problem. In this thesis, a system including $n$ parallel interfering AWGN transmission paths is considered, where the power of the transmitters are subject to some upper-bounds. For such a system, we obtain a closed form for the boundaries of the rate region based on the Perron-Frobenius eigenvalue of some non-negative matrices. While the boundary of the rate region for the case of unconstrained power is a well-established result, this is the first result for the case of constrained power. This result is utilized to develop an efficient user removal algorithm for congested networks. In these networks, it may not be possible for all users to attain a required Quality of Service (QoS). In this case, the solution is to remove some of the users from the set of active ones. The problem of finding the set of removed users with the minimum cardinality is claimed to be an NP-complete problem. In this thesis, a novel sub-optimal removal algorithm is proposed, which relies on the derived boundary of the rate region in the first part of the thesis. Simulation results show that the proposed algorithm outperforms other known schemes.

Channel sharing is known as a unique solution to satisfy the increasing demand for the spectral-efficient communication. In the channel sharing technique, several users concurrently communicate through a shared wireless medium. In such a scheme, the interference of users over each other is the main source of impairment. The task of performance evaluation and signaling design in the presence of such interference is known as a challenging problem. In this thesis, a system including $n$ parallel interfering AWGN transmission paths is considered, where the power of the transmitters are subject to some upper-bounds. For such a system, we obtain a closed form for the boundaries of the rate region based on the Perron-Frobenius eigenvalue of some non-negative matrices. While the boundary of the rate region for the case of unconstrained power is a well-established result, this is the first result for the case of constrained power. This result is utilized to develop an efficient user removal algorithm for congested networks. In these networks, it may not be possible for all users to attain a required Quality of Service (QoS). In this case, the solution is to remove some of the users from the set of active ones. The problem of finding the set of removed users with the minimum cardinality is claimed to be an NP-complete problem. In this thesis, a novel sub-optimal removal algorithm is proposed, which relies on the derived boundary of the rate region in the first part of the thesis. Simulation results show that the proposed algorithm outperforms other known schemes.

In today's world, it is becoming increasingly important to be able to design high performance integrated circuits (ICs) and have them run at as low power as possible. Gate sizing and threshold voltage (Vt) assignment optimizations are one of the major contributors to such trade-offs for power and performance of ICs. In fact, the ever increasing design sizes and more aggressive timing requirements make gate sizing and Vt assignment one of the most important CAD problems in physical synthesis. A promising gate sizing optimization algorithm has to satisfy requirements like being scalable to tackle very large design sizes, being able to optimally utilize a large (but finite) number of possible gate configurations available in standard cell library based on different gate sizes and/or threshold voltages (Vt) and/or gate lengths (Lg), and also, being able to handle non-convex cell delays in modern cell libraries. The work in this thesis makes use of the research-oriented infrastructure made available as part of the ISPD (International Symposium on Physical Design) 2012 Gate Sizing Contest that addresses the issues encountered in modern gate sizing problems. We present a two-phase optimization approach where Lagrangian Relaxation is used to formulate the optimization problem. In the first phase, the Lagrangian relaxed subproblem is iteratively solved using a greedy algorithm, while in the second phase, a cell downsizing and Vt upscaling heuristic is employed to further recover power from the timing-feasible and power-optimized sizing solution obtained at the end of first phase. We also propose a multi-core implementation of the first-phase optimizations, which constitute majority of the total runtime, to take advantage of multi-core processors available today. A speedup of the order of 4 to 9 times is seen on different benchmarks as compared to serial implementation when run on a 2 socket 6-core machine. Compared to the winner of ISPD 2012 contest, we further reduce leakage power by 17.21% and runtime by 87.92%, on average, while obtaining feasible sizing solutions on all the benchmark designs. / text