Master of Science / Department of Industrial & Manufacturing Systems Engineering / Todd Easton / This thesis introduces the Bay Crane Scheduling (BCS) problem and related BCS algorithm. The purpose of this algorithm is to optimize the assignment of jobs to overhead cranes as well as the sequence in which each crane performs its assigned jobs. This problem is unique from other Overhead Crane Scheduling (OCS) problems through its increased complexity. Up until now, OCS problems involve a set number of cranes operating in a single common area, referred to as a bay, and are unable to pass over each other. The BCS problem involves a varying number of active cranes operating in multiple bays. Each crane is allowed to move from one bay to the next, through specific locations called bridges. This is crucial to completing certain “special” jobs that require two cranes operating in unison to transport an item. The BCS algorithm employs two continuous time simulations in conjunction with an initial job-assignment algorithm and a Simulated Annealing (SA) improvement heuristic in order to minimize the non-productive crane time, while avoiding overloading any crane. To the extent of the author’s knowledge, this is the first time a continuous time simulation has been used to model an OC system. The BCS algorithm was originally developed for a large manufacturing facility, and when it was tested against the facility’s current scheduling methods, it shows a 20% improvement in the overall active crane time required to complete equivalent set of jobs. This improved efficiency is crucial to the manufacturing facility being able to increase its production rate without the addition of new cranes. In addition, BCS is statistically shown to be superior to the current strategy. The results from BCS are substantial and practitioners are encouraged to utilize BCS’s methodologies to improve other overhead crane systems.

Stochastic system identification is of great interest in the areas of control and communication. In stochastic system identification, a model of a dynamic system is determined based on given inputs and received outputs from the system, where stochastic uncertainties are also involved. The scope of the report is to consider continuous-time models used within control and communication and to estimate the model parameters from sampled data with high accuracy in a computational efficient way. Continuous-time models of systems controlled in a networked environment, stochastic closed-loop systems, and wireless channels are considered. The parameters of a transfer function based model for the process in a networked control system are first estimated by a covariance function based approach, relying upon the second order statistical properties of the output signal. Some other approaches for estimating the parameters of continuous-time models for processes in networked environments are also considered. Further, the parameters of continuous-time autoregressive exogenous models are estimated from closed-loop filtered data, where the controllers in the closed-loop are of proportional and proportional integral type, and where the closed-loop also contains a time-delay. Moreover, a stochastic differential equation is derived for Jakes's wireless channel model, describing the dynamics of a scattered electric field with the moving receiver incorporating a Doppler shift. / <p>Article I was still in manuscript form at the time of the defense.</p>

This work investigates two different digital signal processing (DSP) approaches that rely on signal-derived timing: continuous-time (CT) DSP and variable-rate DSP. Both approaches enable designs of energy-efficient signal processing systems by relating their operation rates to the input activity. The majority of this thesis focuses on CT-DSP, whose operations are completely digital in CT, without the use of a clock. The spectral features of CT digital signals are analyzed first, demonstrating a general pattern of the quantization noise spectrum added in CT amplitude quantization. Then the focus is narrowed to the investigations of the system characteristics and architecture of CT digital infinite-impulse-response (IIR) filters, which are barely studied in the previous work on this topic. This thesis discusses and addresses previously unreported stability issue in CT digital IIR filters with the presence of delay-line mismatches and proposes an innovative method to design high-order CT digital IIR filters with only two tap delays. Introducing an event detector allows the operation rate of a CT digital IIR filter to closely track the input activity even though it is a feedback system. For the first time, the filtered CT digital signal is converted to a synchronous digital signal. This facilitates integrating the CT digital filter and conventional discrete-time systems and expands the applications of the former. This discussion uses a computationally efficient interpolation filter to improve the signal accuracy of the synchronous digital output. On the circuit level, a new delay-cell design is introduced. It ensures low jitter, good matching, robust communication with adjacent circuits and event-independent delay. An integrated circuit (IC) with all these ideas adopted was fabricated in a TSMC 65 nm LP CMOS process. It is the first IC implementation of a CT digital IIR filter. It can process signals with a data rate up to 20 MHz. Thanks to the IIR response and the 16-bit resolution used in the system, the implemented filter can achieve a frequency response much more versatile and accurate than the CT digital filters in prior art. The implemented system features an agile power adaptive to input activity, varying from 2.32mW (full activity) to 40μW (idle) with no power-management circuitry. The second part of the thesis discusses a variable-rate DSP capable of processing samples with a variable sampling rate. The clock rate in the variable-rate DSP tracks the input sampling rate. Compared to a fixed-rate DSP, the proposed system has a lower output data rate and hence is more computationally efficient. A reconstruction filter with a variable cutoff frequency is used to reconstruct the output. The signal-to-noise ratio remains fixed when the sampling rate changes.

Distance sampling and spatial capture-recapture are statistical methods to estimate the number of animals in a wild population based on encounters between these animals and scientific detectors. Both methods estimate the probability an animal is detected during a survey, but do not explicitly model animal movement. The primary challenge is that animal movement in these surveys is unobserved; one must average over all possible paths each animal could have travelled during the survey. In this thesis, a general statistical model, with distance sampling and spatial capture-recapture as special cases, is presented that explicitly incorporates animal movement. An efficient algorithm to integrate over all possible movement paths, based on quadrature and hidden Markov modelling, is given to overcome the computational obstacles. For distance sampling, simulation studies and case studies show that incorporating animal movement can reduce the bias in estimated abundance found in conventional models and expand application of distance sampling to surveys that violate the assumption of no animal movement. For spatial capture-recapture, continuous-time encounter records are used to make detailed inference on where animals spend their time during the survey. In surveys conducted in discrete occasions, maximum likelihood models that allow for mobile activity centres are presented to account for transience, dispersal, and heterogeneous space use. These methods provide an alternative when animal movement causes bias in standard methods and the opportunity to gain richer inference on how animals move, where they spend their time, and how they interact.

Esta tese versa sobre a síntese de compensadores antiwindup para sistemas lineares contínuos invariantes no tempo, com restrições no atuador e atraso no tempo. Baseados em um funcional Liapunov-Krasovskii e uma condição de setor para a função zona-morta já existentes na literatura, são propostas condições suficientes expressas em LMIs para a existência de compensadores antiwindup para duas classes de sistemas: sistemas com atraso nos estados, e sistemas com atraso na entrada. Em ambos os casos, considera-se a síntese de um compensador de ordem plena para um sistema com um controlador dado a priori desprezando limites do atuador. A síntese dos compensadores antiwindup considera um atuador restrito em amplitude e o sistema sujeito a perturbações limitadas em norma L2. A verificação das condições enunciadas garante a estabilidade da origem em malha fechada, e um conjunto de inicialização dos estados do sistema tolerante à perturbação com norma L2 inferior a um máximo, determinado juntamente com a síntese do compensador antiwindup. Na ausência de perturbação a origem é garantida assintoticamente estável. Para sistemas com atraso no estado, primeiro propõe-se um método para a síntese de compensadores dinâmicos racionais de ordem plena. Este método é baseado no Lema de Projeção. Em seguida, estende-se o resultado, propondo-se um framework genérico que permite a síntese de compensadores racionais e não racionais. Este método é baseado em uma transformação de variáveis linearizante. Para sistemas com atraso na entrada, propõe-se três resultados de síntese de compensadores antiwindup: compensadores estáticos, dinâmicos racionais, e dinâmicos não racionais. Estes métodos são novamente baseados no Lema de Projeção. Em todos os casos, as condições obtidas que garantem a existência de um compensador antiwindup são expressas em forma de LMIs e garantem a estabilidade local da origem. Em seguida, estende-se os resultados para garantir a estabilidade global da origem, nos casos em que a planta é estável em malha aberta. Problemas de otimização são propostos para ambos os métodos para maximizar a tolerância à perturbação e a minimização do ganho L2 da perturbação à saída regulada. Exemplos numéricos ilustram cada método na solução dos problemas de máxima tolerância à perturbação, e minimização do ganho L2 da perturbação à saída regulada. / This thesis verses about antiwindup compensator synthesis for linear time invariant continuous systems, presenting constraints in actuator and time delay. Based on a Liapunov-Krasovskii functional and a sector condition for the dead-zone nonlinearity already castign in literature, it is proposed sufficient conditions expressed in LMI to the existance of an antiwindup compensator for two classes of systems: systems with state delay, and systems with input delay. In both cases it is considered the synthesis of a full order antiwindup compensator for a system with a controller a priori given that disregards the actuator bounds. The synthesis of antiwindup compensators considers an actuator constrained in amplitude and a system subjected to norm-L2 bounded disturbances. Once the casted conditions are verified, it is assured the closed loop origin stability; a set for the initial states of the system tolerating disturbances up to a maximum L2 norm, which is also determined along the antiwindup compensator synthesis procedure. In the absence of disturbance the origin is assuredly asymptotically stable. For state delay systems, first it is proposed a method for designing full order rational antiwindup compensators. This method is based on the Projection Lemma. Afterwards, results are extended proposing a generic framework allowing the synthesis of rational and nonrational compensators of different topologies. This method is based on a linearizing variable transformation. For input delay systems, it is proposed three synthesis results: static, rational dynamic and nonrational dynamic compensators. These methods are based on the Projection Lemma. In all cases, the conditions obtained assuring the existance of an antiwindup compensator are expressed by means of LMIs that, once verified, assure the origin local stability. Then, the conditions are extended for the global stability case, when the system is open loop stable. Optimization problems are proposed for both methods to maximize the disturbance tolerance and the minimization of the L2-gain of the disturbance to the regulated output. Numerical examples are presented to illustrate each method in the solution of the problems of maximum disturbance tolerance, and minimization of L2-gain from the disturbance to the regulated output.

Component values of integrated filters vary considerably due to· manufacturing tolerances and environmental changes. Thus it is of major importance that the components of an integrated filter be electronically tunable. The method explored in this thesis is the transconductance-C-method. A method of realizing higher-order filters is to use a cascade structure of second-order filters. In this context, a method of tuning second-order filters becomes important The research objective of this thesis is to determine if the Neural Network methodology can be used to facilitate the filter tuning process for a second-order filter (realized via the transconductance-C-method). Since this thesis is, at least to the knowledge of the author, the first effort in this direction, basic principles of filters and of Neural Networks [1-22] are presented. A control structure is proposed which comprises three parts: the filter, the Neural Network, and a digital spectrum analyzer. The digital spectrum analyzer sends a test signal to the filter and measures the magnitude of the output at 49 frequency samples. The Neural Network part includes a memory that stores the 49 sampled values of the nominal spectrum. ·A comparator subtracts the latter values from the measured (actual) values, and feeds them as input to the Neural Network. The outputs of the Neural Network are the values of the percentage tuning amount The adjusting device, which is envisioned as a component of the filter itself, translates the output of the Neural Network to adjustments in the value of the filter's transconductances. Experimental results provide a demonstration that the Neural Network methodology can be usefully applied to the above problem context. A feedforward, singlehidden layer Backpropagation Network reduces the manufacturing errors of up to 85% for the pole frequency and of up to 41% for the quality factor down to less than approximately 5% each. It is demonstrated that the method can be iterated to further reduce the error.

Automatic synthesis of digital VLSI layout has been available for many years. It has become a necessary part of the design industry as the window of time from conception to production shrinks with ever increasing competition. However, automatic synthesis of analog VLSI layout remains rare. With digital circuits, there is often room for signal drift. In a digital circuit, a signal can drift within a range before hitting the threshold which triggers a change in logic state. The effect of parasitic capacitances for the most part, hinders the timing margins of the signal, but not its functionality. The logic functionality is protected by the inherent noise immunity of digital circuits. With analog circuits, however, there is little room for drift. Parasitic influence directly affects signal integrity and the functionality of the circuit. The underlying problem automatic VLSI layout programs face is how to minimize this influence. This thesis describes a software tool that was written to show that the minimization of parasitic influence is possible in the case of automatic layout of continuous-time filters using transconductance-capacitor methods.

The classical Fickian model for solute transport in porous media cannot correctly predict the spreading (the dispersion) of contaminant plumes in a heterogeneous subsoil unless its structure is completely characterized. Although the required precision is outside the reach of current field characterization methods, the classical Fickian model remains the most widely used model among practitioners. Two approaches can be adopted to solve the effect of physical heterogeneity on transport. First, upscaling methods allow one to compute “apparent” scale-dependent parameters to be used in the classical Fickian model. In the second approach, upscaled (non-Fickian) transport equations with scale-independent parameters are used. This research aims at comparing upscaling methods for Fickian transport parameters with non-Fickian upscaled transport equations, and evaluate their capabilities to predict solute transport in heterogeneous media. The models were tested using simplified numerical examples (perfectly stratified aquifers and bidimensional heterogeneous media). Hypothetical lognormal permeability fields were investigated, for different values of variance, correlation length and anisotropy ratio. Examples exhibiting discrete and multimodal permeability distributions were also investigated using both numerical examples and a physical laboratory experiment. It was found that non-Fickian transport equations involving fractional derivatives have higher upscaling capabilities regarding the prediction of contaminant plume migration and spreading, although their key parameters can only be inferred from inverse modelling of test data.

The continuous downscaling of CMOS technology presents advantagesand difficulties for IC design. While it allows faster, denser and more energy efficient digital circuits, it also imposes several challenges which limit the performance of analogue circuits. Concurrently, applications are continuously pushing the boundaries of power efficiency and throughput of electronic systems. Accordingly, IC design is increasingly shifting into highly digital systems with few necessary analogue components. Particularly, continuous-time (CT) sigma-delta (ΣΔ) analogue-to-digital converters (ADCs) have recently received a growing interest, covering high-resolution medium-speed requirementsor offering low power alternatives to low speed applications. However, there are still several aspects that deserve further investigation so as to enhancethe ADC’s performance and functionality. The objective of the research performed in this thesis is the investigation of digital enhancement solutions for CT ΣΔ ADCs. In particular, two aspects are considered in this work. First, highly digital techniques are investigated to minimize circuit impairments, with the objective of providing solutions with reduced analogue content. In this regard, a multi-bit CT ΣΔ modulator with reduced number of feedback levels is explored to minimize the use of linearisation techniques in the DAC. The proposed architecture is designed and validated through behavioural simulations targeting a mobile application. Additionally, a novel self-calibration technique, using test-signal injection and digital cancellation, is proposed to counteract process variations affecting single loop CT implementations. The effectiveness of the calibration technique is confirmed through corner simulations using behavioural models and shows that stability issues are minimized and that a 7 dB SNDR degradation can be avoided. The second aspect of this thesis investigates the use of high order CT modulators in incremental ΣΔ (IΣΔ) and extended-range IΣΔ ADCs, with the objective of offering low-power alternatives for low-speed high-resolution multi-channel applications. First, a 3rd order single loop CT IΣΔ ADC, targeting an 8-channel 500 Ksamples/sec rate per channel recording system for neuropotential sensors, is proposed, fabricated and tested. The proposed architecture lays the theoretical groundwork and demonstrates a competitive performance of high-order CT IΣΔ ADCs for low-power multi-channel applications. The ADC achieves 65.3 dB/64 dB SNR/SNDR and 68.2 dB dynamic range. The modulator consumes 96 μW from a 1.6 V power supply. Additionally, the use of extended range approach in CT IΣΔ ADCs is investigated,so as to reduce the required number of cycles per conversion while benefiting from the advantages of a CT implementation. The operation, influence of filter topology and impact of circuit non-idealities are first analysed using a general approach and later validated through a test-case. It was found that, by applying analogue-digital compensation in the digital domain, it is possible to minimize the noise leakage due to analogue-digital transfer function mismatches and benefit from relaxed amplifiers’ finite gain-bandwidth product and finite DC gain, allowing, as a consequence, a power conscious alternative. / QC 20120528

We say that (weak/strong) time duality holds for continuous time quasi-birth-and-death-processes if, starting from a fixed level, the first hitting time of the next upper level and the first hitting time of the next lower level have the same distribution. We present here a criterion for time duality in the case where transitions from one level to another have to pass through a given single state, the so-called bottleneck property. We also prove that a weaker form of reversibility called balanced under permutation is sufficient for the time duality to hold. We then discuss the general case.