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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design methodology for thermal management using embedded thermoelectric devices

Alexandrov, Borislav P. 07 January 2016 (has links)
The main objectives of this dissertation is to investigate the prospects of embedded thermoelectric devices integrated in a chip package and to develop a design methodology aimed at taking advantage of the on-chip on-demand cooling capabilities of the thermoelectric devices. First a simulation framework is established and validated against experimental results, which helps to study the cooling capabilities of embedded thermoelectric coolers (TEC) in both a transient and steady state. The potential for up to 15°C of total cooling has been shown. The thermal simulation framework allows for rapid assessment of TEC and system level thermal performance. Next, the thesis develops a co-simulation environment that is capable of simulating the thermal and electrical domain and couples them to design intelligent TEC controllers. These controllers are implemented on chip and can leverage the transient cooling capability of the device. The controllers are simulated within the co-simulation environment and their potential to control high power chip events are thoroughly investigated. The system level overheads are considered and discussions on implementation techniques are presented. The co-simulation framework is also extended to allow for simulation of real predictive technology microprocessor cores and their workloads. Finally the thesis implements a fully on-chip autonomous energy system that takes advantage of the TEC in its reverse energy harvesting mode and uses the same device to harvest energy and use the energy to power the on-chip cooling circuit. This increases the overall energy efficiency of the cooler and verifies the TEC control methods.
2

Digital communication and control circuits for 60ghz fully integrated CMOS digital radio

Iyer, Gopal Balakrishnan 08 April 2010 (has links)
Emerging "bandwidth hungry" applications such as high definition video distribution and ultra fast multimedia side-loading have extended the need for multi-gigabit wireless solutions beyond the reach of conventional WLAN technology or even more recently emerging UWB and MIMO systems. The availability of 7GHz of unlicensed bandwidth in the 60GHz spectrum, represents a unique opportunity to address such data-throughput requirements. The 60GHz Integrated CMOS digital radio chipset comprises of PHY and MAC layers, RF transceiver, High-Speed Digital Interface and an underlying Serial Communication Fabric. To have a complete communication solution compliant with the latest ECMA-369, ISO/DIS 13156 and IEEE 802.15.3c standards, we build a million gate digital implementation of MAC and PHY. The Serial Peripheral Interface (SPI) serves as the bridge between the higher layers in the communication stack (PAL-MAC) and the lower layers like PHY-RF Front End. The MAC module can setup the communication link on the fly by tuning parameters such as operating channel, channel bonding and bandwidth, data rates, error correction mechanisms, handshaking mechanisms, etc, by using the SPI to communicate with internal components. The SPI interface plays a crucial rule in not only this, but also during the testing and debug phase. Operation of each of the RF modules is monitored through the serial interface using local SPI slaves which are hooked up to the 4-wire serial bus running all through the chip. The SPI host controller emulates an embedded protocol analyzer. For calibration and fine tuning purposes, digital settings can also be loaded onto these modules through the SPI interface. R-2R DACs are used to convert these commands into analog voltages which then provide a tunable bias to the RF and mixed-signal modules. Other key functions of this serial communication and control interface are: Initialization of all of the RF and mixed signal modules, DC calibration of data converter, PLL and other mixed-signal modules, data acquisition, parametric tuning for digital modules such as linear equalizer, Gain Control loops (AGC, VGA), etc. Ultra high speed digital Input-Output buffers are used to provide an external data interface to the radio chipset. These high speed I/Os are also used in the gbps (gigabit-per-second) link for data transfer between the RF transceiver chip and the PHY-MAC baseband chip. The IOs are expected to comply with different signaling standards such as LVDS, SLVS200, SLVS400, etc. A robust system involves a meticulous pad ring design with proper power domains and power cuts. Full-chip integration of the digital PHY, MAC, peripheral logic and IO ring is done in a semi-custom fashion.
3

Řídicí obvody kolejového výtahu / Control circuits of railway lift

Kopecký, Jan January 2020 (has links)
This master thesis deals with the mechanical and electrical design of the drive of the inclined construction lift. Individual components are selected in the design. Furthermore, a theoretical research is carried out regarding wireless modules and logic controllers. The selection of sensors is made and the method of retrieving signals from sensors and converting them into iputs the control circuits is also outlined. A program is written in Arduino IDE that wirelessly controls the motion of a motor via variable frequency drive.
4

Odstraňovač zubního kamene / Eliminator of dental calculus

Halaš, Rostislav January 2011 (has links)
Tato práce se zabývá návrhem ultrazvukového odstraňovače zubního kamene pracujícím na frekvenci 27 kHz s maximální intenzitou ultrazvuku 5W/cm2. Popisuje mechanismus vzniku zubního kamene, důsledky na zdraví a metody jeho odstraňování. Zaměřuje se na principy odstraňování s využitím ultrazvukového vlnění. Dále je sestaveno funkční a blokové schéma. Na základě těchto znalostí je proveden návrh a výpočet jednotlivých částí aplikátoru. Výkonové a napěťové poměry jsou vypočítány od aplikačního hrotu směrem ke generátoru. V neposlední řadě je popsán návrh obvodů buzení měniče i kontrolních obvodů. Schémata jsou doplněna výkresy desek plošných spojů a soupiskou součástek.
5

Transformátorová páječka 500W / Power soldering station 500W

Šelepa, Jan January 2010 (has links)
This thesis contains a complete description of the design and implementation of a 500W transformer soldering station. This soldering station includes a half-bridge DC/DC converter with a pulse transformer. The device works with a very low voltage and extremely high output current. Therefore some parts have a special design to ensure the proper equipment function. Coaxial transformer with very low leakage inductance (nH units) is unusual. A synchronous rectifier is another special feature working with low voltage and high output current of the transformer. The finished functional prototype consists of a soldering station and a soldering adapter.

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