It is generally accepted that transient faults are a major cause of failure in micro processor systems. Industrial controllers with embedded microprocessors are particularly at risk from this type of failure because their working environments are prone to transient disturbances which can generate transient faults. In order to improve the reliability of processor systems for industrial applications within a limited budget, fault tolerant techniques for uniprocessors are implemented. These techniques aim to identify characteristics of processor operation which are attributed to erroneous behaviour. Once detection is achieved, a programme of restoration activity can be initiated. This thesis initially develops a previous model of erroneous microprocessor behaviour from which characteristics particular to mal-operation are identified. A new technique is proposed, based on software implemented fault tolerance which, by recognizing a particular behavioural characteristic, facilitates the self-detection of erroneous execution. The technique involves inserting detection mechanisms into the target software. This can be quite a complex process and so a prototype software tool called Post-programming Automated Recovery UTility (PARUT) is developed to automate the technique's application. The utility can be used to apply the proposed behavioural fault tolerant technique for a selection of target processors. Fault injection and emulation experiments assess the effectiveness of the proposed fault tolerant technique for three application programs implemented on an 8, 16, and 32- bit processors respectively. The modified application programs are shown to have an improved detection capability and hence reliability when the proposed fault tolerant technique is applied. General assessment of the technique cannot be made, however, because its effectiveness is application specific. The thesis concludes by considering methods of generating non-hazardous application programs at the compilation stage, and design features for incorporation into the architecture of a microprocessor which inherently reduce the hazard, and increase the detection capability of the target software. Particular suggestions are made to add a 'PARUT' phase to the translation process, and to orientate microprocessor design towards the instruction opcode map.

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In this thesis we consider linear multivariable frequency response systems with finite numbers of unstable poles but with no poles on the j(omega) - axis. We represent unstable systems by input-output mappings with restricted domains in / (DIAGRAM, TABLE OR GRAPHIC OMITTED...PLEASE SEE DAI) / The effects of unstable perturbations in an open loop system K on the closed loop system (I + K)('-1) are studied. For this purpose the gap metric is introduced for measuring approximations to unstable systems. This metric is used to determine the sets of "allowable" uncertainties, i.e., those which do not destroy the stability of a feedback system, and which preserve a specified tolerance on the closed loop input-output behavior. / It is shown that the allowable sets of uncertainties consist of closed operators which are contained in spheres sufficiently small in the gap metric. Also, all metrics which separate allowable uncertainties from the others are shown to generate the same topology as the gap. / It is shown that all admissible approximations to a nominal frequency response system have domains with the same codimension, and therefore the same number of r.h.p. poles as the nominal system. / Various estimates of the gap between two unstable systems are obtained, and applied to examples.

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