• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 579
  • 188
  • 159
  • 56
  • 49
  • 25
  • 24
  • 17
  • 12
  • 12
  • 12
  • 12
  • 12
  • 12
  • 8
  • Tagged with
  • 1310
  • 434
  • 415
  • 411
  • 380
  • 359
  • 318
  • 240
  • 239
  • 234
  • 180
  • 171
  • 170
  • 139
  • 134
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

Charge-coupled devices for analog-to-digital conversion

Michelson, Robert Carroll 12 1900 (has links)
No description available.
52

Analytical study of a controlled current PWM converter

Nishimoto, Masahiro. January 1986 (has links)
No description available.
53

A single-phase cycloconverter /

Hamblin, Thomas Munro January 1974 (has links)
No description available.
54

DC capacitor voltage balancing in multi-level converters

Espah Boroojeni, Mehrdad 19 January 2012 (has links)
Multi-level converters that provide more than two levels of voltage to achieve an output waveform closer to sinusoidal waveform with less distortion are very attractive to power applications. This thesis investigates several multi-level converter topologies and different modulation strategies such as pulse-width modulation and space vector modulation. Attention is paid in particular to SVM strategy. Although SVM strategy is applicable for N-level converter, this thesis only focuses on five-level and three-level diode clamped converter (DCC). Despite their appealing harmonic spectrum and low losses, multi-level converters are known to suffer from inherent voltage imbalance on their dc side. The thesis presents a method in order to balance the dc side capacitor voltages for an N-level converter. The presented balancing method is based on minimizing a cost function which is related to voltage divergence of the dc capacitors. This method is used for a three-level SVM to overcome the voltage drifting problem.
55

Realization of negative-immittance converters and negative resistances with controlled sources

Kuo, Chang-kiang 12 1900 (has links)
No description available.
56

An incremental analog-to-digital converter

Williamson, Frank Robert 08 1900 (has links)
No description available.
57

Optimum operating conditions of a multi-grid frequency converter

Clary, William Thomas 05 1900 (has links)
No description available.
58

Two-dimensional modeling of a proposed auxilliary ionization scheme for thermionic converters

Larson, Gregg D. 12 1900 (has links)
No description available.
59

DC capacitor voltage balancing in multi-level converters

Espah Boroojeni, Mehrdad 19 January 2012 (has links)
Multi-level converters that provide more than two levels of voltage to achieve an output waveform closer to sinusoidal waveform with less distortion are very attractive to power applications. This thesis investigates several multi-level converter topologies and different modulation strategies such as pulse-width modulation and space vector modulation. Attention is paid in particular to SVM strategy. Although SVM strategy is applicable for N-level converter, this thesis only focuses on five-level and three-level diode clamped converter (DCC). Despite their appealing harmonic spectrum and low losses, multi-level converters are known to suffer from inherent voltage imbalance on their dc side. The thesis presents a method in order to balance the dc side capacitor voltages for an N-level converter. The presented balancing method is based on minimizing a cost function which is related to voltage divergence of the dc capacitors. This method is used for a three-level SVM to overcome the voltage drifting problem.
60

Design, analysis and control of a bi-directional self-starting symmetrical two-phase switched reluctance machine

Hamdy, Ragi A. R. January 1999 (has links)
No description available.

Page generated in 0.0439 seconds