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This thesis presents the development of compact model of novel silicon carbide (SiC) Vertical Junction Field Effect Transistor (VJFET) for high-power circuit simulation. An empirical Angelov model is developed for SiC VJFET in PSpice. The model is capable of accurately replicating the device behavior for the DC and Transient conditions. The model was validated against measured data obtained from devices developed by Mississippi Center for Advanced Semiconductor Prototyping at MSU and SemiSouth Laboratories. The modeling approach is based on extracting Angelov Equations Coefficients from experimental device characteristics using non linear fitting. The coefficients are extracted for different parameters (temperature, width, etc). Multi-Dimensional Interpolation Technique is used to incorporate the effect of more than one parameter. The models developed in this research are expected to be valuable tools for electronic designers in the future. The developed model was applied for investigating the characteristics of a few standard analog circuit blocks using SiC VJFET and Si JFET in order to demonstrate the capabilities of the model to reveal the relative advantages of one over the other. The selected circuits of interest were Voltage Follower, Common Source Amplifier, Current Source and Differential Amplifier. Simulations of analog circuit building blocks incorporating SiC VJFET showed better circuit functionality compared to their Si counterparts.

The steady state model and analysis of a phase-shift controlled series resonant inverter (PSC-SRl) is presented. This steady state model includes the evaluation of the zero-voltage switching (ZVS) condition and the determination of the ZVS operating region. Based upon this analysis a frequency control strategy that minimizes circulating energies is proposed. Also, a methodology to design the power stage components, and to predict the duty ratio and the operating frequency range is presented using a PSC-SRl design example operating at 500 kHz and 10 kW. In addition, a novel and simple frequency control circuit that implements the proposed frequency control strategy is provided. Besides, the analysis of the PSC-SRl complete power stage and two control-loop system (frequency control and duty ratio control) is given. Furthermore, the small-signal model and the compensation schemes for each of the control loops is presented. The analytical predictions are compared with experimental data measured from a 500 kHz, 10 kW laboratory prototype and conclusions are drawn. / Ph. D.